Northrop Grumman Selected to Build Tranche 2 Transport Layer-Beta Data Transport Satellites
August 22, 2023 | Northrop GrummanEstimated reading time: 1 minute
Northrop Grumman Corporation has been selected by the Space Development Agency (SDA) to design and build 36 data transport satellites, the first space vehicles in the latest generation of its low-Earth orbit Proliferated Warfighter Space Architecture (PWSA). The team will now update the company’s Tranche 1 design to add new broadcast and tactical communications capabilities to PWSA.
The satellites will integrate with, and expand the PWSA mesh network, utilizing high-data-capacity optical crosslinks to deliver accessible, near-real time communications to U.S. warfighters and defensive platforms operating around the globe. The design for this latest iteration, known as Tranche 2 Transport Layer Beta (T2TL Beta), builds on the 42 Tranche 1 Transport Layer (T1TL) and 14 Tranche 1 Tracking Layer (T1TRK) satellites that SDA previously announced it had awarded Northrop Grumman. The T2TL Beta space vehicles add new broadcast and tactical waveforms improving the capabilities of the overall PWSA.
“Creating a low-Earth orbit communications architecture that meets the needs of the warfighter is complex,” said Blake Bullock, vice president, communication systems, Northrop Grumman. “With Northrop Grumman's extensive military satellite communication experience and deep mission understanding, we are helping SDA make its vision a reality.”
Northrop Grumman announced in April it had completed critical design review on its T1TL design in just over a year and in May completed optical interoperability testing. The company is on track to launch its first plane of 21 space vehicles in Q4 2024.
Suggested Items
Real Time with… IPC APEX EXPO 2024: My Role as a Technology Solutions Director
05/02/2024 | Real Time with...IPC APEX EXPOPeter Tranitz, senior director of technology solutions at IPC, shares insights into his role as the design initiative lead. He details his advocacy work, industry support, and the responsibilities of the design initiative committee. The conversation also covers the revamping of standards, the IPC Design Competition, and the implementation of design rules in software tools.
Real Time with… IPC APEX EXPO 2024: Ventec Discusses New Pro-bond Family of Advanced Products
05/01/2024 | Real Time with...IPC APEX EXPOChris Hanson, Ventec's Global Head of IMS Technology, outlines the launch of four pro-bond formulas that deliver an outstanding combination of low dissipation factor (Df) with a dielectric constant (Dk) range to maximize the design window for critical PCB parameters. As Chris points out, Pro-bond is designed for low-loss, high-speed applications, while thermal-bond dissipates heat from a component through the board to a heat sink.
IPC's Vision for Empowering PCB Design Engineers
04/30/2024 | Robert Erickson, IPCAs architects of innovation, printed circuit board designers are tasked with translating increasingly complex concepts into tangible designs that power our modern world. IPC provides the necessary community, standards framework, and education to prepare these pioneers as they explore the boundaries of what’s possible, equipping engineers with the knowledge, skills, and resources required to thrive in an increasingly dynamic field.
On the Line With… Talks With Cadence Expert on SI/PI for PCB Designers
05/02/2024 | I-Connect007In “PCB 3.0: A New Design Methodology—SI/PI for PCB Designers,” subject matter expert Brad Griffin, Cadence Design Systems, discusses how an intelligent system design methodology can move some signal and power integrity decision-making into the physical design space, offering real-time feedback.
iNEMI Packaging Tech Topic Series: Role of EDA in Advanced Semiconductor Packaging
04/26/2024 | iNEMIAdvanced semiconductor packaging with heterogenous integration has made on-package integration of multiple chips a crucial part of finding alternatives to transistor scaling. Historically, EDA tools for front-end and back-end design have evolved separately; however, design complexity and the increased number of die-to-die or die-to-substrate interconnections has led to the need for EDA tools that can support integration of overall design planning, implementation, and system analysis in a single cockpit.