Mark Thompson: What Designers Need to Know about Fab


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Mark Thompson wants to help PCB designers. He’s seen it all in CAM support at Prototron Circuits: the incomplete or inaccurate data packages, boards that are unnecessarily complex or over-constrained, and so much more. As technical customer liaison, Mark leads tours of Prototron’s facility in Redmond, Washington, often providing PCB designers and design engineers their first glimpse inside a board shop. Mark just returned to writing his popular Design007 Magazine column, The Bare (Board) Truth, which addresses questions such as, “What happens to your design at CAM?”

I’ve known Mark for years, and it’s always a pleasure get a chance to talk with him. In our interview, I asked Mark to explain why it’s so important for designers to communicate with their fabricators, and why they need to get out of the office and visit a board shop every now and then.

Dan Beaulieu:  Good morning, Mark. Good to see you again. I have a few questions for you.

Mark Thompson: Fire away!

Beaulieu: So, why should PCB designers talk to board shops?

MarkThompson250.jpgThompson: Excellent question, straight to the point. The answer is, because designers need to understand fabrication needs, and we as fabricators need to know their needs. Since we primarily deal with prototypes here at Prototron, most of the parts we see are first-run prototypes, and we have the potential to find unforeseen errors that need to be aired out before production.

Board applications have changed so vastly over the years that it is difficult, if not impossible, for a fabricator to attempt to guess at a customer’s intentions. Nor should he try! That’s where a simple conversation between the board designer and the board fabricator can be invaluable. For example, a customer may ask me questions like these: “Mark, what is the smallest mechanical hole size you can do?” Or “What is the thinnest dielectric you can deal with?” Or, “What is the minimum solder mask clearance you need?”

All are perfect examples of questions that, depending on the customers’ intentions, and they can be answered in multiple ways. The first question, asking about minimum mechanical hole size, is usually followed by “What is the smallest signal pad associated with that hole size and what is the smallest anti-pad on a plane layer for that hole size?” This is where the fabricator should be asking more questions, such as, “Are you referring to vias when you ask about our smallest hole size?”

Because you can buy yourself back a lot of real estate for trace routing, smaller pad sizes and smaller anti-pad sizes by your tolerance callout. If you call them out as +/-.003” we must drill some .004-.005” mils larger than the nominal hole size to plate back down to the nominal. If all you want is electrical continuity and don’t really care how small a given via ends up, call it out as +.003” minus the entire hole size. This tells a fab shop that they can drill the hole smaller, which makes my answers about minimum pad and minimum anti-pad size more appealing. They can now be smaller.

The same holds true with the second question. I need more information on my part to adequately answer this question. Sure, I can tell you we can use .0025” core internally for capacitance and decoupling, but can we have .0025” pre-preg dielectric between 1 oz. clad cores? No! And that is where my conversation changes to copper aspect ratios and pre-preg nesting or loss due to the layer type. Is it full plane, where it may not lose a lot of dielectric distance, or a signal where it may lose some dielectric?

To read this entire interview, which appeared in the May 2018 issue of Design007 Magazine, click here.

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