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Dr. Antonio Caputo will be presenting his paper on "Evaluating the Recess Depths of Recess-in-Motherboards using Different Metrologies" at IPC APEX EXPO 2019 at the San Diego Convention Center in San Diego, California on Tuesday, January 29, 2019 from 1:30 p.m. to 3:00 p.m. He is taking part in a series on advanced plating.
Caputo’s presentation will focus on two common techniques to fabricate recessed cavities in PCBs and explores the effectiveness and advantages of a novel technique for measuring and evaluating their integrity.
Caputo, a packaging R&D engineer at Intel, is focused on driving path finding activities related to different PCB technologies. He holds a Ph.D. from the University of Toronto with a specialty in high performance materials.