EIPC Winter Conference, Day 2


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Markku Jämsä.jpg

Markku Jämsä of Aspocomp presented the next paper of the session on “Thermal Management in PCBs: Options for Designers.” Jämsä took the delegates on an interesting journey through different methods of PCB cooling, focussing on thermal vias, and metal-back and embedded copper coin techniques. Jämsä then proceeded to show examples of the technologies before sharing detailed benchmark data of the various options showing the advantages and disadvantages of each. The presentation closed with a glimpse of possible future cooling possibilities, including mechanically-drilled, copper-filled thermal vias, high-conductivity coin materials (>500 W/mK), 3D-printed complex embedded cooling elements, and active cooling.

John Fix.jpgThe next session of the conference, “New Soldering Technology: Quality Assurance and Durability Testing,” was chaired by EIPC Board Member John Fix of Taiyo America.

Then, the paper on “The Current State of Solder Limits” was presented by Crystal Vanderpan of UL, U.S. Vanderpan started by giving background on the UL PCB Program. The purpose of the program was to reduce risk. Vanderan also explained solder limits as reflecting the maximum temperatures and times of the assembly soldering process, which was defined as any component assembly time spent over 100°C or the maximum operating temperature (MOT)—whichever was greater.

Crystal Vanderpan.jpgVanderpan also noted that solder limits could be a single time and temperature or multiple times and temperatures—multiple solder limits (MSL)—and that solder limits do not apply if hand soldering. Vanderpan went on to explain that solder limits are a critical parameter for the PCB and are characterised as part of the recognition process with thermal stress testing used for evaluation of solder limits.

Vanderpan’s presentation continued, describing how traditional solder float test is not representative of SMT solder operations, and that three standard reflow profiles are available to test—T230C, T245C, and T260C. Also, the collaboration between the OEM, assembler, and PCB fabricator continues to lead to finding the most appropriate standardized solder limits/assembly profile. Vanderpan summarised, saying that solder limits represent the soldering process the PCB is exposed to during component assembly, the term “solder limits” could be changed to “assembly profile,” and that PCBs tested with multiple solder limits diminish the risks to end-product consumers.

Next, the conference to welcomed Robert Boguski of Datest, U.S., whose paper was titled “New Developments in Digital Computed Tomography (CT) for Nondestructive Failure Analysis of PCBFs and PCBAs.” Boguski began by contrasting two-dimensional X-ray projection images with two-dimensional vertical-slice CT images. He explained that through CT data, reconstruction spatial dimensions of all features could be calculated and digitally rendered into a true volume representation. This representation can then be visualised as the entire volume or an individual sliced view of interest.

Robert Boguski.jpgBoguski further addressed that the X-ray penetration information in 3D space is divided into small cube units—voxel pixels—with the value of each element being a function of the chemical composition and density of the material in the element. Consequently, each small cube is full of features, such as defects, boundaries, and material properties.

Also, Boguski discussed Datest’s 225-kV microfocus CT setup and showed some very impressive visualisations of objects as diverse as a tangerine, a hard drive, and an electric screwdriver. However, it was the detailed visualisation of PCB and PCBA features, of course, that most interested the audience. Boguski concluded his presentation with a summary that CT can be a useful inspection technique and that non-destructive testing (NDT) will be integral to the next evolution of manufacturing technologies in PCB manufacturing as well as many other industries.

Lei Wang.jpgDr. Lei Wang of Heraeus Deutschland spoke next on “Development of a High-reliability, No-clean Solder Paste.” Wang began his presentation by describing the cleaning of solder paste residues as a complicated and high-cost process. The motivation of the development was to find a no-clean solution that overcomes traditional concerns of future reliability risk. Wang went on to describe the technical challenge of using an activator to enable wetting whilst not making the assembly susceptible to later surface insulation resistance (SIR) failures, explaining that finding the appropriate balance was the key to success. The results of the newly-developed DP3 solder paste were presented for a variety of surface finishes and processes, all demonstrating good results. Wang concluded with a summary of reliability, solderability, and workability data.

Michiel de Monchy.jpgNext, the delegates heard from Michiel de Monchy of MacDermid Alpha Electronics Solution whose paper covered “Principles of Silver Sintering and the Importance of PCB Finishes.” De Monchy began by addressing the principles of silver sintering. He described it as a process of atomic diffusion where at a temperature below the melting point, the atoms in the powder particles diffuse across the boundaries of the particles, fusing the particles together and creating one solid piece.

De Monchy also discussed the advantages as an alternative to soldering as a die attach, including having superior electrical and thermal conductivity as well as higher reliability. The demand for it was being fuelled by growth in electromobility, and silver was found to be the ideal die attach solution. Then, he explained the ALPHA® Argomax® advanced bonding technology based on silver sintering process along with results obtained with a variety of surface finishes. De Monchy concluded with a prediction that silver sintering as a die attach finish to the substrate will grow significantly in the near future.

Hermann Reischer.jpgHermann Reischer of Polar Instruments, Austria, presented the last paper of the conference titled “New Automated Controlled Impedance Tester.” Reischer began with a comprehensive explanation of the need for controlled impedance testing and a detailed description of test methods and procedures. He also made a case for increasing test volumes, tighter tolerances, improved gauge R&R, unattended testing, and the elimination of human influence on measurement, referencing improved traceability.

Reischer further explained the design challenges presented by developing an automated test solution. He also described the development of a rotating differential probe head that could adapt to different test coupon formats whilst applying a constant probe pressure. Reischer closed with an impressive visual demonstration of the automated test equipment, utilising a custom-built tray containing 30 test coupons.

Conference Closing

After the final panel discussion, I brought the conference to a close, commenting on how delighted I was as a metallurgist to have had access to so much high-quality content in my field of expertise. 

Image 6-EIPC Winter Conference (Day 2).jpg

I thanked the sponsors with a special mention of Elga Europe for their kind hospitality, the session chairs, the speakers, and EIPC Technical Director Tarja Rapala and the programme team for their valuable contributions to the conference. I also extended my sincerest thanks to EIPC Executive Director Kirsten Smit-Westenberg and EIPC Project Manager Carol Pelzers for their diligent attention to detail, ensuring our continued success.

I noted that our much-loved reporter, journalist, and technical editor Pete Starkey was “hors de combat” after a fall earlier in the week and wished him well for a speedy and full recovery. In closing, I invited the delegates to join us for the next EIPC conference to be held in Leoben, Austria, June 13–14, which will include a factory visit to AT&S.

Technical editor’s note: I most gratefully acknowledge the support of EIPC Chairman Alun Morgan for preparing this review and providing the photographs. Many thanks! — Pete Starkey

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