EIPC Summer Conference 2019, Day 2
Editor's note: Click here to read Part 1.
EIPC Board Member Christian Behrendt of Ilfa opened the second day as moderator of the session covering design process reliability. Behrendt was kind enough to thank EIPC Executive Director Kirsten Smit-Westenberg and EIPC Project Manager Carol Pelzers for their excellent organisation of the conference.
The first paper of the session was presented by Lars Böttcher of Fraunhofer IZM and was entitled “High-Density RDL Technologies for Fan-Out Panel Level Packaging.” His paper began with a description of the current practice of embedded packaging technologies with connections fanned out of the IC surface and compared the techniques of embedding in organic laminate and embedding in an epoxy mold compound. Böttcher then introduced the new concept of panel-level package (PLP) embedding, which uses a laminate (PCB) core to embed the dies to provide high handling stability and limitation of die shift.
Böttcher developed the concept with considerations of PCB core selection, dielectric films suitable for ultra-fine line redistribution layer (RDL) structures and direct imaging (DI) developments from the current 4-μm capability towards 2-μm lines and spaces with adaptive alignment. He also showed the current status of PLP embedding with a detailed description of the required process steps and examples up to a 510x515-mm panel containing 660 modules per panel (1,320 chips). Böttcher concluded by confirming the feasibility of the presented process with future work planned for process cost reduction and scaling to larger panel formats.
Then, Martin Cotton of the High Density Packaging User Group (HDPUG) spoke on the subject of PCB trace geometry and effects. He began with an appraisal of the PCB as a mechanical structure to support “wires” that connect electronic devices. Cotton described the positioning of these wires, that we now call traces, as having causes and effects related to their width, thickness, surfaces, edges, corners, adherence, and geometric variance. He argued that design and manufacturing have a huge impact on the success of creating the ideal placement and positioning of the traces relative to each other and how they are connected; in modern electronic circuits, the core part of the design is the differential pair.
Cotton further explained the design of differential pairs using simulation data and stackup modelling and showed "the impedance triangle" graphic, which demonstrated the relatively greater importance of dielectric constant over dissipation factor of substrates in the design process. He concluded with an interesting analysis where he postulated that increasing layer density through the use of ultra-low dielectric constant materials could result in reducing office rental and usage costs by as much as 15%. Although Cotton did end by saying, "For this presentation, I have taken liberties."
The presentation by Marko Pudas of Picosun OY provided a fresh approach to an old problem. His paper was entitled “Mitigation of Tin Whiskers With Atomic Layer Deposition (ALD) and a New Solution for PCB Processes.” Pudas began with an introduction to Picosun and the process of ALD, which he described as a batch coating process that’s able to coat a range of materials from 100 nm up to ~0.5 µm. Then, he explained that the particular issue addressed by Picosun was a space application through a partnership with The European Space Agency (ESA), which was developed to provide a conformal coating with a number of advantages over traditional solutions. Solutions included the blocking of tin whiskers, a moisture and gas barrier, the ability to be reworked and combined with other coating methods, and the near-zero increase in weight.
Pudas showed the test board configuration and explained that stage-one validation of the process was completed with the demonstration of tin whisker mitigation and >80-V breakthrough voltage. Stage two covered verification of the first-stage experiment and route planning to establish validation of ALD coating for suppliers and testing of ALD encapsulation of plastic packages for space use and increased lifetime in ambient and test boards with relevant space-grade and COTS (polymer packages) now in the reporting phase. Pudas concluded with a request to delegates to identify their critical components to be validated with the ALD process in other industries, such as automotive, medical, etc.
Next, conference attendees heard from Stig Källman of Ericsson in his presentation entitled “Be Prepared for Higher Data Rates in Mobile Systems.” He covered 5G developments, and the delegates were interested to learn that Ericsson had already shipped over 3 million 5G-ready radios. The technical aspect of signal loss factors was explained showing that the design, dielectric constant, and dissipation factor accounted together for 65% of signal loss. Källman then explained the importance in process variability reduction and showed that the key production parameters of tolerances for line width, substrate thickness, layer-to-layer registration, and impedance would have to be reduced by 50% by 2023 to meet the new requirements.
Källman also emphasized the importance of substrate selection, foil type, oxide treatment, and solder mask electrical properties, joking that everyone needed a "secret decoder ring" to make sense of the plethora of acronyms associated with copper foil profiles. He proceeded with a video demonstration of the difference between the 20-ms latency of 4G systems with the 1 ms promised by 5G. Källman showed footballers taking penalties with the goalkeeper using a virtual reality headset relaying video from the field of play. At 4G latency, the goalkeepers were ineffective, whereas with the 5G signal, they saved the penalties with ease; what a difference 19 ms makes! Finally, Källman closed by saying, "The political world remains in turmoil, and technology will not slow down. Whoever masters 5G-IoT will lead the world."
Stefano Dada of Rogers Corporation presented on critical material properties for millimetre-wave and high-speed digital applications. He started with an overview of high-frequency circuit material properties and contrasted PTFE-based and hydrocarbon-based materials with both woven and non-woven-glass and with ceramic fillers. Dada then expanded on the critical material properties for common millimetre-wave applications identifying copper surface roughness and surface finish, final plated finishes, dissipation factor (Df), dielectric constant (Dk), woven-glass reinforcement, thermal coefficient of Dk (TCDk), and the thermal coefficient of dissipation factor (TCDf) and moisture absorption. Next, he showed charts of insertion loss vs. substrate thickness, demonstrating that thinner circuits are dominated by conductor loss whilst thick circuits are dominated by dielectric loss.
Dada also explored copper foil production techniques, identifying rolled copper as having historically the lowest profile and lowest loss foil for PCB laminates. They have been used in RF laminates for 50+ years for premium performance, albeit at a premium cost compared to standard electrodeposited copper foil. Dada introduced Rogers’ proprietary copper foil treatment alongside data showing its insertion loss improvement over materials using standard foils. He further expanded on the impact of final plated finish, Dk tolerance, and glass-weave effect. Dada concluded that the emerging 5G millimetre-wave designs require materials with a variety of thin thickness options and a glass style ideal for high-speed signal transmission that minimizes signal skew.
Staying with the materials theme, Shannon Juan of Elite Material Co. presented a paper entitled “Copper Treatment Investigation on High-Frequency PCB Insertion Loss.” Juan opened with an overview of Elite Material’s positioning in the global laminate market and their manufacturing footprint before showing a chart mapping data rates against time with a future requirement of 112 Gbps, necessitating ultra-low loss materials. Further, she explained that insertion loss was a key factor and showed that dielectric loss and conductor loss both contributed to the insertion loss. Then, Juan went into further detail on copper foil roughness, demonstrating that lower copper foil roughness improves signal integrity performance.
Juan then described how the study’s objective was to determine the attribution of different copper foil types and surface treatment on insertion loss by using two copper foil treatments and three alternative oxide treatments. The test setup used a vector network analyser (VNA) for loss measurements up to 40 GHz and an optical surface profiling technique. The results of the study showed a small (2%) improvement by using the lower profile foil, but that the largest effect was seen from the surface treatment, the best of which coupled with the lowest profile foil showed a 13% improvement from the baseline. Juan concluded that roughness of copper foil and surface treatment play important roles in future high-speed applications and that surface treatment is critical to the electrical performance even when using smoother copper foil in ultra-low-loss PCB design.
After a networking break, EIPC Board Member Hubert Zimmermann of Dyconex introduced “Automation of Fabrication Technology.” The first presenter was Peter Walshe of Notion Systems who returned to the theme of inkjet in his presentation on solder resist printing. He started by showing that five process steps could be eliminated by using inkjet over conventional technology and claimed that a typical inkjet system could save over 124.000 €/ year over a conventional solder resist line.
Walshe went on to compare inkjet with laser direct imaging (LDI), curtain coating/spray coating, and screen printing, highlighting the advantages of inkjet.
Then, he extolled the additional advantages of inkjet, including locally adaptable height, which could be used for the formation of dams or other structures and user selection of surface reflection level. Walshe ended his presentation ended with a video of an automated inkjet installation incorporating 6-axes input and output robots.
The next speaker was Víctor Lázaro of Chemplate Materials SL, who introduced a novel laminating technology. After some information on Chemplate, he introduced their lamination press machine using induction to produce the necessary heat to cure the laminates, which was described as being radically different from the standard methods used to date (i.e., no oil, electrical heaters, or steam). Lázaro described the novelty of the Chemplate system as the heat energy to cure the composite resins is produced only at the laminate material in each panel, and at the same time, with the same temperature magnitude and without any thermal conduction delays. The system offers extremely high temperatures at very high ramp-up rates with high energy efficiency in a very elegant package using minimal space.
Lázaro also explained the operation of the inductive heating as converting induced electric energy into heat directly in the separator plates. This generates heat on every plate immediately to the laminate in contact both above and below, allowing quick thermal transfer throughout the entire stack height. He continued by summarizing the advantages of the new system and detailing the technical capabilities. Lázaro concluded that he saw the potential for the system for standard laminates, fast cycle lamination, advanced materials, and R&D of new advanced materials to be industrialized.
Uwe Altmann of Orbotech was the next presenter with his paper entitled “AOI to AOS Workflow.” He began with an overview of state-of-the-art automated optical inspection (AOI) systems. Altmann went on to describe the function of automatic optical shaping (AOS) systems, which show great promise for improving workflow efficiency by the elimination of the verification station. He also explained that panels are scanned and defects are sent to remote multi-image verification (RMIV) before shaping starts, and high-quality images of all defects are taken and sent to a shaping defects classification (SDC) station. SDC stations serve several AOS systems where the operator classifies all defects and selects only true defects, resulting in a 60–70% reduction in false alarms and providing a one-stop solution for opens and shorts. Altmann ended his presentation by demonstrating the resultant workflow improvement by removing the need for a verification station with resultant savings in manpower and floor space plus reduced capital equipment and less panel handling.
Outi Rusanen of Tactotek delivered the final paper of the day and conference with her presentation entitled “Smart Molded Structures Bring Surfaces to Life.” She started with a comparison of a teardown of a conventional automotive lighting cluster requiring 25 tools and with more than 60 assemblies to a functionally equivalent structure produced with in-mold structural electronics (IMSE), which required two tools, was a single assembly, weighed over 70% less, and was 95% thinner. Rusanen explained that with this technology, developers could eliminate complex multi-part electronics assemblies and replace them with one-piece solutions that are thin, light, and strong, without compromising functionality.
Rusanen continued by describing the process of forming the IMSE component as comprising printing, surface mounting (on flat film), shape-forming, and final injection molding. She shared that the reliability test data for rapid change of temperature (-40°C to +85°C) and steady-state temperature-humidity of 85°C/85% RH showed excellent results. Rusanen concluded with the statement that IMSE has huge growth potential and offers a reliable alternative to conventional electronics with the advantage of significant weight and thickness reduction.
Conclusion
I brought the conference to a close after the final panel discussion and thanked the sponsors AT&S, Adeon Technologies, Dyconex, Dupont, I-Connect007, Isola, Orbotech, Polar Instruments, and Ventec International Group for their kind support with a special thank you to the City of Leoben and AT&S for making the conference so special. Thanks were also extended to the session chairs, speakers, and delegates for attending. Final thanks were saved for Kirsten Smit-Westenberg and Carol Pelzers again for their excellent organisation of the conference where—despite being in Austria—everything ran as smoothly as a Swiss watch!
Technical editor’s note: I most gratefully acknowledge the support of EIPC Chairman Alun Morgan for preparing this review and providing the photographs. Many thanks!—Pete Starkey
