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DesignCon Best Paper: Practical Analysis of Backplane Vias
April 8, 2009 |Estimated reading time: Less than a minute
Accurate, verified models for vias in a multilayer circuit board are necessary to predict link performance in the GHz regime. This paper, which won a Best Paper Award at DesignCon 2009, describes the methodology of using measurements on a test vehicle to build a high-bandwidth, scalable model of long vias that includes the through and stub effects which can be used for system simulation. This simple model also provides valuable insight into the root cause of performance limits and how to overcome them. Authors are Eric Bogatin, Bogatin Enterprises; Lambert Simonovich, Nortel; and Sanjeev Gupta and Mike Resso, Agilent Technologies.
Click here to read.