PCB Reliability: Cleaning Up Your Act


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Editor's Note: This article originally appeared in the September 2012 issue of SMT Magazine.

I’ve written in the past regarding PCB reliability from a pure fabrication standpoint. Examining the backbone procedures in the fabrication process, we asserted that adherence to mechanical guidelines insured steadfast boards in the field. What I did not address, however, is the impact of surface cleanliness on long-term reliability in the field. The cleanliness of a completed PCB is crucial.

As pioneering bare board cleanliness researchers would eventually discover, the major source of ionic contamination is the board itself! A circuit board with high levels of ionic contamination will result in deteriorated insulation resistance and dielectric strength. This environment causes dendrite growth across the surface of the PCB, which will ultimately reduce the field life of the end product.

Bare board cleanliness is a critical enough issue that some major users of PCBs have specific requirements for monitoring ionic contamination, and in December 2009 IPC published a specification dedicated to this topic (IPC-5704). If cleanliness requirements for unpopulated PCBs is fundamental enough that the IPC created the 5-32c Bare Board Cleanliness Assessment Task Group, which then developed the 5704 specification, the industry’s only requirements dedicated to printed board cleanliness, why is it not being called out in fabrication notes? The major source of ionic contamination is the board itself!

In performing research for this article, I came to the conclusion that, like any great product, cleanliness must be properly marketed to achieve success. In many of my customer meetings, when the team presents how it combats ionic contamination, it’s not surprising to see many “deer in the headlights” expressions on visitors’ faces.

Long-Term Impact of Ionic Contamination

Long-term PCB reliability is often measured by the number of thermal cycles a PCB can pass without crossing a pre-established threshold of damage/performance degradation. Others measure PCB reliability through a cross-section examination of plated through holes and dielectric. The common theme here is that these methods are all testing mechanical functions or properties of the PCB.

With thermal cycling, the test methods are simulating operation over time through accelerated testing. What this eliminates, though, is the testing of defects caused by time itself. One such defect is electrochemical migration, or dendritic growth.

Dendritic Growth 

IPC defines dendritic growth as the growth of conductive metal filaments on a PCB through an electrolytic solution under the influence of a DC voltage bias. Essentially, water absorbs into the surface of the board over time in operation, possibly connecting near proximity conductors. However, if the PCB surface has excess ionic contamination, this process is accelerated via the growth of dendrites, which are metallic filaments. As dendrites from isolated nets come into contact with each other on the PCB surface, performance degrades with effects ranging from intermittent operation to massive short-circuiting of the PCB. This, of course, is a very simplified explanation of the failure mechanism. An excellent paper on this topic, “Electrochemical Migration on HASL Plated FR-4 Printed Circuit Boards,” was written by members of the Naval Surface Warfare Center in conjunction with the University of Maryland. 

Figure 1: Time-elapsed footage of dendrite growth on PCB surface.

The earliest information on dendritic growth via ionic contamination that we have found comes from the automotive industry. Historically, the auto industry incorporated lower-technology PCBs. However, as infotainment and vehicle intelligence requirements increased, the corresponding designs evolved to include new technologies which, in turn, drove down line width and spacing. As spacing decreased, validation test engineers began seeing higher rates of failure during environmental testing. Through much research, they found that combinations of poor PCB cleaning and higher-humidity environments could accelerate these failures, leading to supplier requirements that have, over time, morphed into the current IPC-5704 specification.

Cause

Dendritic growth is the culmination of separate events rooted in the PCB fabrication process.

Since this is a surface cleanliness issue, soldermask plays a key role in dendritic growth. One of the properties of soldermask is that the material has pores in the surface. These pores can act as little “cups” that retain flux used in the hot air solder levelling (HASL) final finish process (SnPb and lead-free).

The flux, in turn, is the single largest source of ion contamination in the PCB fabrication process. The pores increase the volume of flux that is retained on the board surface after the HASL process.

Measurement/Detection

IPC-5704 provides industry guidance on both testing methods and acceptance criteria for bare board cleanliness. Through the use of ion chromatography, IPC-5704 establishes maximum levels of each component of ionic contamination, as set forth in the below table.

Unfortunately, the application of this standard as a method of internal control for PCB fabricators is not widespread due to the equipment required to provide such detailed test results.

Most PCB fabricators test for total ionic contamination using an ionograph. Obtaining a detailed breakdown of total ionic contamination for comparison to the above chart requires the use of an ion chromatograph. Fortunately, many third-party reliability testing laboratories offer this as a service for PCB fabricators and end-users.

Solutions

The easiest solution is to conformal coat the assembly to freeze these contaminants in place. For many assemblers, though, this is not truly the easiest solution due to added costs and failure modes. The best way to solve for a dirty board is to clean it well in the first place.

As with anything, though, getting something clean is easier when it’s less dirty. As such, we propose a multi-step approach to bare board cleanliness.

The first step is to address soldermask pores. An easy method for the PCB fabricator to eliminate, or at the very least minimize, these pores is to complete the cross-linking process within the soldermask by applying a UV “bump” to the PCB during the fabrication process. This added process step has the effect of closing off these pores in the soldermask surface, eliminating the primary retention mechanism of flux.Below are ionic contamination results of two boards that went through identical processing with the exception of one having gone through a UV bump. The other board was withheld from this process step. Now that we’ve minimized the opportunities for accumulations of flux, we need to address cleaning any residual flux from the HASL process from the surface of the PCB. This is a two-step method consisting of mechanical obligations corresponding with chemical specifications.

Mechanical

The mechanical method involves the use of industry-standard equipment that has been modified to provide a more aggressive approach to PCB surface cleaning.

A very robust cleaning unit, in our opinion, would include:

   The net result of the described process is to literally heat, beat, and scrub the flux from the PCB surface. Since industry-standard equipment meeting IPC-5704 standards does not exist, customized, or custom-designed, cleaning equipment is required.

Chemical

Working in conjunction with mechanical means of cleaning is a chemical additive that acts as a cleaning agent to break up and disperse flux residue on the PCB surface. Note that while there may be other alternatives, my company works with EnviroSense’s EnviroGold cleaning product. I asked EnviroSense’s Mark Palmer to describe the effect of a cleaning agent on flux:

Twenty years ago, when EnviroSense Inc. started to sell to PCB fabricators, we found most fab houses were using city water only to clean HASL and/or fusing fluxes. Some companies that needed a higher standard of cleanliness would use powdered detergents such as Cascade dish soap. In those days the geometries, spacing(s) were much larger and most PCBs did not have tight vias or high-density SMT placements. City water and off-the-shelf consumer detergents can contain ionic materials such as Na, NaCl, P, K, as well as other unwanted inorganics and organics. They also did not always rinse completely. Even if the detergents did rinse well, the subsequent use of city water as a rinsing media would reapply unwanted ionic species back on the panel/coupon.

EnviroSense’s products are saponifiers. Saponifiers turn the acids in flux and plating residues into soaps. The saponification is performed by the mono-ethanol amine (MEA), and the lowered surface tension is supplied by the surfactants and glycols contained in our chemistry. All these combined compounds will attack the residues by chemical dissolution along with undermining/lifting these contaminants from the surfaces being cleaned. The chemical properties of these compounds are highly water-soluble in the rinsing process.

Today cleaning chemistry needs to meet the following criteria:

  • Low surface tension: Able to lower the wash solution to under 35 dyne per cm;
  • Extremely hydrophilic: Able to be rinsed after wash section;
  • Biodegradable;
  • Ease of disposal, pH adjust and/or treatment;
  • Low foaming;
  • Non-flammable;
  • Health and safety compliant;
  • Low volatile organic compounds (V.O.C.s);
  • Low odor;
  • In a high concentrate form (so customer is not paying freight for water content); and
  • Have a good “loading” (how much flux residue it can clean per panel/coupon per gallon of concentrate used.

Even if a chosen chemistry meets all of the above, the cleaning machinery’s layout is just as important. The following are basic parameters for a good lay-out:

  • Deionized water--8 meg-ohm or better for both wash chemistry mixing and for the subsequent rinsing processes.
  • A minimum of two “cascading forward” rinse sections between/after any chemical wash or plating section(s). This will minimize cross-contamination of section(s).
  • Temperature capability, from 50°C to 70°C for both wash and rinse section(s).
  • Enough cleaning and rinsing space to accommodate the needed throughput per minute, per hour, per day for particular product.
  • Pumps and pump heads (designed in prior) to allow for needed delivery volume and pressures of wash and rinse sections.

Conclusion    

Bare board cleanliness is a serious matter and also a relatively new issue. In addition to PCB design, the product’s environment causes ionic contamination to form dendritic growth. PCB end-users should review their designs and the environment in which the boards will be used. Based on positive findings, specifications should be modified to include adherence to IPC-5704. This will minimize the risk of latent field failures due to ionic contamination-related dendrite growth.

Finally, on-site auditing of PCB suppliers is recommended since industry-standard equipment and cleaning methods generally do not have enough effectiveness on the PCB to meet IPC-5704. Yash Sutariya is vice president of Corporate Strategy at Saturn Electronics Corporation (SEC) and owner/president of Saturn Flex Systems, Inc. Since joining the team, SEC has successfully navigated from a low-mix, high-volume automotive supplier to a high-mix, medium- to high-volume diversified supplier. As a result of the company’s transformation, manufacturing capabilities now range from quick-turn prototypes to scheduled volume production while attending a broad cross-section of industries to include industrial controls, telecommunications, aerospace, and power supply industries.

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