The European Angle: Institute of Circuit Technology 43rd Annual Symposium

Time marches on and change is inevitable. Here we are anticipating the consequences of a Fourth Industrial Revolution—new technologies are blurring the lines between physical, digital and biological worlds, with the potential to fundamentally alter the way we live, work, and relate to one another. But where and when did the Dr_Andy_Cobley.jpgoriginal industrial revolution begin? Look back 300 years, to the blast furnaces and forges of the midlands of England—the Black Country—where innovation, entrepreneurial and manufacturing skills created the world’s first industrial landscape. The Black Country Living Museum, which tells the story of that revolution, was venue for the 43rd Annual Symposium of the Institute of Circuit Technology.

ICT Chairman Dr. Andy Cobley welcomed an enthusiastic gathering of PCB professionals to network with their peers whilst enjoying an outstanding symposium programme, this year focused on aspects of design and its impact on PCB manufacturability and reliability.

Bill_Wilkie.jpgThe keynote presenter, introduced by ICT Technical Director Bill Wilkie, was Ventec Director of OEM Technology Martin Cotton, celebrating 50 years in PCB design.

Cotton held the attention of the audience for over an hour with an enthralling and action-packed account of his life and career, from modest beginnings in 1951 in Northwest London, with an education disrupted by re-location, through the 50 years since his first PCB layout as an apprentice in 1967. Included was his present-day mission to use his knowledge and experience to guide OEM customers in selecting and specifying their substrate materials so that product performance and functionality can Martin_Cotton.jpgbe optimised whilst maximising manufacturability and cost-effectiveness.

With a series of interesting and often highly amusing anecdotes, he acknowledged the people who had influenced his career and recounted many examples of design challenges he had encountered and overcome, and some of the significant innovations he had introduced. One of the most notable was the principle of “max copper,” with reference to the IBM P/S2-30 personal computer in the mid-late 1980s. He re-laid the 4-layer main board as a double-sided and re-panelised it for 2-up manufacture. And all the redundant space was occupied by a copper ground with no electrically isolated slivers. This resulted in enhanced electrical performance and improved flatness and dimensional stability, as well as reducing the amount of copper to be etched. Cotton had to be innovative in developing a technique for incorporating max copper because it was beyond the scope of the CAD systems of the time, and he used a CAM system and “negative data” to achieve it. Max copper is a feature of most current designs; regrettably, Cotton had omitted to patent the concept.

Turning to present-day design challenges, Cotton focused on new-generation high-speed materials and discussed how an understanding of the “impedance triangle” could help designers avoid making controlled-impedance lines narrower than necessary and mitigate some of the consequential effects on trace resistance and insertion loss.

Michael_Ford.jpgAs a presenter, Martin Cotton is a hard act to follow. But the ICT was privileged to welcome Michael Ford, senior market development manager with Mentor Graphics, who gave an attention-grabbing and thought-provoking performance with his analysis of the essential role of DFM in new product introduction. He began by considering issues involved in the transition from “Industry 3.0” to “Industry 4.0,” including the automation of automated processes, the computerisation of human decision-making and optimisation based on the live environment, and the significance of these issues in a Lean context. Lean was the mind-set of not doing anything you didn’t need to do, and when you did do something, doing it right-first-time without any waste.

Ford explained that the traditional electronic product ecosystem was a cycle that started and ended with market analysis: create the opportunity, design the product, lay-out the PCB, fabricate the PCB, source the components, assemble, test, ship and distribute. It was in the distribution stage of the value chain where most of the costs lay; assembly cost was trivial in comparison. For example, if smart phones were manufactured in Germany, they would cost more to make but less to distribute. But PCB design was the most critical step in the cycle, since it had an impact at every subsequent stage of the cycle, and could ultimately be responsible for missed market opportunities and loss of confidence in the product. And although simple design-rule checking would catch obvious violations, it could miss many issues which might not become apparent until further downstream—manufacture, test or, worst case, failure in the market. Therefore, more intelligent design analysis tools were vital in supporting a successful NPI process.

Does my PCB work for manufacturing? With meaningful illustrations and examples, Ford reviewed a series of design issues that could reduce yield and reliability and incur extra cost in PCB fabrication and assembly processes, describing how designs were analysed for manufacturability and how panels were created to optimise yield and material utilisation in both fabrication and assembly. Use of the right DFx (Design for Excellence) tools in the product ecocycle between PCB layout and PCB fabrication gave the OEM designer the opportunity to improve the design and the EMS provider the facility to expose concerns, as well as enabling direct data input into production tooling.

In the Lean manufacturing environment, these software solutions helped avoid design re-spins and reduced time to production, with fewer manufacturing problems, higher yields and improved product reliability. And as Industry 4.0 progressed, they resolved many of the issues constraining the traditional product ecosystem, giving the added flexibility to make on-shoring a competitive option.

Joan_Tourne.jpgIt’s not often we see a radical development in PCB interconnection technology, but Joan Tourné from NextGIn Technology gave an insight into VeCS, a proven alternative approach to Z-axis interconnection which is attracting great interest from OEM designers. He explained that the major limitation of established HDI technologies was the density of vertical interconnections that could be achieved without going through many stages of sequential build-up—an expensive solution. “Why carry on making things smaller—why not make them easier?” In the VeCS approach, the plated hole was replaced by a vertical trace or half-cylinder, enabling the opportunity create more vertical connections per unit area as well as freeing up space for routing conductors. And the vertical conductors could connect to multiple internal layers as required. Additional benefits were improved signal integrity and the absence of paths for CAF.

How was this achieved, and was special equipment necessary? Tourné explained that the basic procedure was to form a slot by a conventional routing operation, and metallise and electroplate it by standard PCB processes, then to drill into the plated slot with a larger diameter drill bit to remove the copper from the areas between the desired vertical conductors. Tool manufacturers could supply router bits designed to minimise burring, and drill-smear problems were avoided because in principle the tool was not withdrawn from the hole it had just cut but was traversed along the slot. Moreover, plating blind slots was more straightforward than plating blind holes of similar diameter and aspect ratio because of better solution penetration and less gas entrapment. So the technology was applicable to any multilayer fabrication facility, with no capital investment required.

Cost savings were realised as a result of reduced layer count for a given interconnection density. If necessary VeCS design features could be incorporated locally on otherwise conventional layouts, for example to overcome fan-out problems under fine-pitch array packages. A further benefit of the VeCS principle was less disruption of internal planes, again improving signal integrity.

VeCS designs were being evaluated by leading OEMs, in cooperation with selected fabricators and assemblers, and EDA vendors were beginning to incorporate VeCS layout capability into their CAD systems.

No visit to the Black Country Museum would be complete without a visit to Hobbs Fish and Chip Shop in the museum’s own High Street. Traditionally cooked in beef dripping and served in newspaper, the lunch-time meal eaten standing in the street gave delegates an authentic taste of the past before returning to the conference room for the afternoon session.

Francesca_Stern.jpgAlways eagerly awaited at ICT symposia is market analyst Francesca Stern’s overview of the global PCB and electronics industries. She summarised trends in electronics production world-wide, then individually for Europe, USA, Japan and China. Likewise, trends in PCB production in Europe, USA, Japan, China/Taiwan and Korea.

UK PCB production had shown reasonable growth so far in 2107, but she believed it had now reached a peak and would decline as the year went on, with a further decline in 2018. The market for PCBs in the UK was increasing slightly, but would flatten in 2018 although there would still be a net import. Her figures did not take into account increasing material costs, partly due to exchange rates and partly to supply chain issues. She forecast that European PCB production would peak in 2017 and show slightly negative growth in 2018. The USA would show no growth in PCB production in 2107, but she expected some positive trends in 2018. China and Taiwan were still doing quite well if flex and rigid figures were combined, but the substantial growth was in flex. And Japan was not forecast to see growth any time soon.

Neil_Chamberlain.jpgBack to the design theme, and specifically to considerations of signal integrity in high-speed designs. Neil Chamberlain, signal integrity product manager with Polar Instruments explored the real-world effect of copper surface roughness on insertion loss, and how it could be quantified as a mathematical parameter in a transmission-line field solver

He explained that whereas DC current was carried uniformly through the cross-sectional area of a conductor, AC currents at frequencies of 10MHz and more were carried mainly in the outer skin of the conductor. As conductors became smaller, the skin effect became more significant and at lower frequencies. “What’s the relationship between frequency and impedance? There isn’t one! But at high frequencies, dielectric loss is the issue.”

Copper foils used in PCB fabrication were deliberately roughened, either electrolytically or chemically, to promote their adhesion to laminating resins. Although “low-profile” and “ultra-low profile” foils were available, they still had some degree of surface roughness and this had a significant influence on skin effect and hence on insertion loss.

PCB designers and pre-production engineers used field solvers for accurate modelling of frequency-dependent PCB transmission lines, to help in choosing appropriate design rules and material parameters. “All models are wrong, but some are useful” was an often-used phrase in the high-speed design community. Chamberlain stressed that effective modelling relied on meaningful input data, and that methods for calculating insertion losses needed to take surface roughness into account. But how could it be measured and assigned a numerical value?

Methods based on mechanically measuring the equivalent number and depth of scratches on conductor surfaces had been used historically, but these were of limited usefulness and only valid for low frequencies. The method proposed by Huray visualised conductor surface topography in terms of pyramids of snowballs and calculated power lost in terms of skin depth and the number and distribution of snowballs in unit area. Simulations had been conducted using different ball radii, and a single effective ball radius had been used to simplify the formula for practical use.

Dennis_Price.jpgDennis Price pretended to retire from the industry a couple of years ago, but evidently couldn’t stay away! Recognised and respected for a no-nonsense, common-sense approach, backed by a lifetime of experience, he gave a PCB fabricator’s perspective on Design for Manufacture, which exemplified many of the issues raised in Michael Ford’s earlier presentation.

Acknowledging the range of knowledge, expertise and competence required to be a good PCB layout engineer, amongst them experience of electronics theory, electronic components, circuit diagrams, materials science, PCB fabrication, assembly and test, engineering drawings, engineering specifications, thermal issues, safety rules and regulations and so on, Price described some of the challenges the PCB manufacturing engineer had to address on receipt of the data package.

He discussed the relative cost and yield factors associated with a range of HDI structures, what laminates were specified, and were they the best choice in terms of performance, reliability, availability and cost-effectiveness, the decisions to be made in determining multilayer stack-ups for impedance-controlled designs, and the importance of meaningful fabrication drawings. So much information - and this was in addition to the checking-out of the PCB layout data! He commented that whatever software tools the PCB designer might have used to check his design before forwarding to the PCB fabricator, the fabricator would always run his own DFM checks against his manufacturing capability and resolve any violations or ambiguities before releasing the job for manufacture.

What sort of design features could result in manufacturability problems and potential yield loss? Price showed a whole catalogue of actual examples: drawn features and planes, poor copper distribution and its consequences on plating uniformity, flatness and dimensional stability, poor via hole positioning, via hole in pad issues, component ident on solder joint pads, auto-routing errors and un-terminated tracks, copper slivers and cross-hatch issues, same net spacing violations. And most of these could have been identified and corrected at the design stage with the sort of DFx tools that Michael Ford had described.

Martin_Cotton2.jpgBill Wilkie brought an extremely enjoyable and informative Annual Symposium to a conclusion, thanked Ventec for their sponsorship of the event and invited Martin Cotton to make the closing remarks. Cotton responded philosophically with some thoughts based on Einstein’s “Circle of Knowledge,” which could realistically be applied to printed circuit design and manufacture. Inside the circle was knowledge, outside was ignorance, and the interface between the two was the domain of the enquiring mind. The larger the circle, the larger the interface between knowledge and ignorance. The more that was known, the more was unknown, and the more answers you got the more questions were needed. In Cotton’s words: “Ignorance is bliss: if you know nothing, there’s nothing to learn!”

I am once again indebted to Alun Morgan for kindly allowing me to use his photographs.

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2017

The European Angle: Institute of Circuit Technology 43rd Annual Symposium

05-22-2017

Time marches on and change is inevitable. Here we are anticipating the consequences of a Fourth Industrial Revolution—new technologies are blurring the lines between physical, digital and biological worlds, with the potential to fundamentally alter the way we live, work, and relate to one another. But where and when did the original industrial revolution begin?

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Ventec International Group's Martin Cotton Celebrates 50 Years in PCB Design

05-15-2017

This column by Pete Starkey celebrates Martin Cotton’s 50 years in PCB design. Amongst Cotton’s more significant design achievements was to successfully tackle the challenge of reducing the layer count of the PCB for the IBM PS/2-30 personal computer in 1986. He transformed a four-layer multilayer into a double-sided PTH that fitted two to a panel, resulting in substantial cost savings.

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Reporting on the Institute of Circuit Technology Spring Seminar

03-21-2017

There has long been debate over the exact location of the geographical centre of England, but the village of Meriden has traditionally laid claim to the title, and it offered an appropriate Midlands venue for the Institute of Circuit Technology 2017 Spring Seminar, which followed the Annual General Meeting of the Institute.

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EuroTech: Raw Materials Supply Chain—Critical Challenges Facing the PCB Industry

02-08-2017

In response to growing concern from members about cost increases and potential availability restrictions affecting copper-clad laminate and prepreg supplies, the EIPC 2017 Winter Conference in Salzburg included a special panel discussion on critical issues facing the raw materials supply chain for the PCB industry worldwide, particularly the availability of copper foil as a consequence of rapidly increasing demand from the manufacturers of lithium batteries for electric vehicles.

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EuroTech: ENIPIG—Next Generation of PCB Surface Finish

01-30-2017

MACFEST is a multi-partner project co-funded by Innovate UK to develop an electroless nickel/immersion palladium/immersion gold (ENIPIG) “universal surface finish” for printed circuit boards. Project partners are University of Leicester, MTG Research, C-Tech Innovation, A-Gas Electronic Materials, Merlin Circuit Technology and the Institute of Circuit Technology.

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2016

EuroTech: Institute of Circuit Technology Northern Seminar 2016, Harrogate

12-08-2016

A new location for the Institute of Circuit Technology Northern Seminar: Harrogate, the elegant and historic spa town in North Yorkshire, England. And an impressive venue: the chandeliered drawing room of the palatial and stately Majestic Hotel, dating from the Victorian era.

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2014

Top 10 SMT Tech Tuesday Articles of 2014

12-30-2014

Technical Editor Pete Starkey presents his list of the top 10 SMT Tech Tuesday articles for 2014. The year's topics cover a wide range and include printed electronics, lead-free processes, preventing tin whiskers, stencil printing challenges, and thermal management issues.

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Top 10 PCB Tech Tuesday Articles of 2014

12-30-2014

Another year has come and gone. To mark a year of innovations, Technical Editor Pete Starkey presents his list of the top 10 Tech Tuesday articles for 2014. Each item on the list provided innovative information to the industry.

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An Inside Look: 3D AOI of Electronic Assemblies Seminar

12-16-2014

This UK event brought together experts from leading AOI suppliers, to discuss and explain different approaches to three-dimensional inspection and to present the latest in technology to those with a collective interest in yield improvement, process control, and quality assurance. All were welcomed by SMART Group Chairman Keith Bryant, who introduced the speakers and moderated the panel discussions. Pete Starkey reports.

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J-STD-001 & IPC-A-610 Updates for Conformal Coating: An Insider's Guide

12-09-2014

SMART Group recently offered a "direct from the committee" technical guide to the changes being made to J-STD-001 and IPC-A-610, presented by Doug Pauls, Principal Materials and Process engineer at Rockwell Collins and chair of IPC Cleaning and Cleanliness Committees, in a webinar organized and moderated by Bob Willis. Technical Editor Pete Starkey reports.

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Institute of Circuit Technology's 2014 Darlington Seminar

11-25-2014

Editor Pete Starkey recently made a trip to the Northeast of England for the Institute of Circuit Technology (ICT) annual Darlington Seminar. Highlights included a presentation from Ventec's Martin Cotton on practical design considerations for high-speed PCBs--"Design once, make many times" was his main message--and a talk from Dr. Andrew Cobley addressing the rise of wearable technology.

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HASLEN: An Obituary to Black Pad

10-28-2014

A webinar recently presented by ITRI Innovation introduced a new solderable finish known as HASLEN, which combines features of two established technologies to deposit solder directly on to electroless nickel by hot air solder leveling, and made possible by novel fluxes based on deep eutectic solvents. The HASLEN finish claims to reduce cost and offer overall improvements in the longevity and reliability of PCB assemblies when compared with ENIG. Pete Starkey reports.

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SMART Group Webinar: Advances in AOI technology

10-22-2014

SMART Group recently presented a webinar to clarify the fundamentals of AOI technology and discuss the strengths and weaknesses of the equipment options currently available. Chairman Keith Bryant drew upon many years' experience as a specialist in X-ray and AOI techniques to give a clear and comprehensive overview, with detailed explanations of attributes and applications.

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Update An Inside Look: UK Collaborative Research Project Dissemination Conference

10-14-2014

The headquarters of the Surface Engineering Association in Birmingham, UK, was the venue for a one-day conference to disseminate the results of a number of UK and European collaborative research and development projects with direct relevance to the electronics manufacturing, surface engineering, and metal finishing industries. Pete Starkey reports

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Up Close: ICT's Hayling Island, UK Seminar

09-30-2014

"Manufactured in the UK" was the theme of this year's Institute of Circuit Technology Hayling Island seminar in Goodwood, UK. Topics ranged from details of the European PCB market and an educational programme aimed at teaching PCB technology in schools to innovations in ink-jet printing, thermal management strategies, and the evolution of solder resist materials. Pete Starkey reports.

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ECWC13:

09-01-2014

First held in London, UK, in 1978, and triennially since then, the 13th Electronic Circuits World Convention came to Nuremberg, Germany, running in parallel with the SMT Hybrid Packaging Exhibition. Technical Editor Pete Starkey reports on the keynote presentations delivered during the event.

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2013

Cleanness Assessment Using Solvent Extract Conductivity to Improve Circuit Reliability

12-11-2013

Technical Editor Pete Starkey reports on an informative webinar presented by Ling Zhou, National Physical Laboratory specialist in electronic circuit reliability and metal-corrosion-induced failure mechanisms, on cleanness assessment using solvent extract conductivity.

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An Inside Look: High-Temperature Electronics Manufacturing

12-04-2013

Moderator Bob Willis explains, "High-temperature electronics is not just about solder, it's about all of the parts that make up an electronics product. Substrates, components, connectors, cables, solders, and assembly processes all need to be considered." Technical Editor Pete Starkey provides an in-depth looks at Willis' latest seminar.

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PCB Technology the Focus of ICT Darlington Seminar

11-12-2013

The Institute of Circuit Technology (ICT) Darlington Seminar, held November 5, 2013, was split between advances in PCB technology and the mechanisms available to help promote the transfer of technology and the development of export business. Technical Editor Pete Starkey gives an inside look.

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An Inside Look: SMART Group European Conference 2013, Day 2

10-15-2013

The second--and intensely technical--day of the SMART Group 2013 European Conference highlighted lead-free solders, the return of cleaning, alloy development, failure analysis, and bath process monitoring and control. Technical Editor Pete Starkey concludes his report.

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An Inside Look: SMART Group European Conference 2013, Day 1

10-15-2013

This year's conference hosted eminent guests from the electronics manufacturing community travelling from far and near to network with peers and increase their understanding of material and process selection and yield improvement techniques. Technical Editor Pete Starkey reports on day one.

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IeMRC 8th Annual Conference: Innovation and Sustainability

10-08-2013

The 8th annual conference of the Innovative Electronics Manufacturing Research Centre (IeMRC) at the UK's Loughborough University featured 11 informative and highly-technical presentations grouped into four sessions: Accelerating Innovation, Flexible Electronics, Sustainability, and Nanoelectronics. Pete Starkey reports.

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ICT Hayling Island Seminar: Young People Don't Lick Stamps

10-01-2013

The ICT Hayling Island Seminar has become a must-attend UK PCB community event. Breaking with tradition this year: The programme offered an alternative to conventional "grey suit brigade" contributions with a focus on the importance of bringing new, younger minds to the industry. Pete Starkey reports.

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Behind the News: Tripod Selects Semblant's Plasma Finish

09-04-2013

Technical Editor Pete Starkey knows what an arduous task it can be to get a new finish recognized, qualified, and specified: "I was favourably impressed to read Semblant's announcement and delighted to then have the opportunity to seek the comments of VP of Worldwide Sales and Marketing Steve McClure." Read on to learn more about the company's plasma-based surface treatment process.

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EIPC Summer Conference, Day 2

07-09-2013

A well-rested and bright-eyed audience reassembled for an early start to the second day of the EIPC Summer Conference in Luxembourg and enjoyed an intense programme of 12 technical papers in three sessions: Advanced PCB Research Projects, PCB Design, and Novel Technologies. Pete Starkey continues his in-depth report.

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EIPC Summer Conference, Day 1

07-03-2013

A small landlocked country in western Europe, bordered by Belgium, France, and Germany, Luxembourg covers an area of less than a thousand square miles and has a population of little more than half a million. The world's only remaining grand duchy, with the world's highest gross domestic product per capita, Luxembourg was the location for the 2013 Summer Conference of the European Institute of Printed Circuits. European Editor Pete Starkey reports.

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2012

An Inside Look: ICT's Annual Northern Seminar

11-13-2012

Hartlepool's Historic Quay was the new venue for this year's Institute of Circuit Technology Northern Seminar. Technical Editor Pete Starkey attended this evening seminar and provides a detailed account of the excellent and informative featured presentations. The section on designers' tendency to be "stubbornly resistant to change" alone is worth a read.

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Meeting Soldering Challenges of Miniaturization

11-05-2012

Although minimum solder joint sizes have stabilised in the 0.3 to 0.4 mm range and soldering technology is currently under control, it is projected that joint sizes could reduce to the 0.1 to 0.2 mm range by 2020. What would be the consequences on manufacturability and reliability?

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NPL Webinar: Practical Applications for Nanoelectronics

10-15-2012

The Nanocarbon Electronic Interconnects project is a collaboration between NPL and University of Surrey, aimed at developing characterisation tools for nanointerconnects based on nanocarbon. Researcher Vimal Gopee presented a webinar October 10, 2012 and Technical Editor Pete Starkey fills you in on the many topics covered.

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Invotec and Printed Electronics: The Story Behind the News

10-08-2012

Technical Editor Pete Starkey recently met with Invotec Managing Director Tim Tatton and PEL Technical Director Dr. Neil Chilton at their offices in Tamworth, UK, to discuss the significance of their strengthened partnership and the new opportunities it would create.

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A Walk on the Technical Side: SMART Group's 2012 European Conference, Day 2

10-05-2012

The second day of SMART Group's 2012 European Conference got underway in Thame, Oxfordshire, UK with a second grouping of industry experts ready to present and attendees eager to learn. Technical Editor Pete Starkey made the trip for I-Connect007 and continues his detailed report.

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A Walk on the Technical Side: SMART Group's 2012 European Conference

09-25-2012

Thame, a charming old market town close to the Chiltern Hills in the county of Oxfordshire, was the venue for SMART Group's 2012 European Conference. As always, Technical Editor Pete Starkey made the trip for I-Connect007 and reports, in his usual amazing detail, on the presentations given, new information revealed, and areas of study.

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EIPC's Summer Conference in Milan: Day 2

09-19-2012

The Ramada Plaza in Milan, Italy was venue for the 2012 Summer Conference of the EIPC which drew delegates from 10 European countries, as well as from the U.S. and Israel, to meet, network, and learn from an intense two-day programme of 21 presentations and a factory tour. In his typical fashion, Technical Editor Pete Starkey provides an excellent review of Day Two.

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EIPC's Summer Conference in Milan: Day 1

09-17-2012

The Ramada Plaza in Milan, Italy was venue for the 2012 Summer Conference of the EIPC which drew delegates from 10 European countries, as well as from the U.S. and Israel, to meet, network, and learn from an intense two-day programme of 21 presentations and a factory tour. In his typical fashion, Technical Editor Pete Starkey provides an excellent review of Day One.

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IeMRC Conference: One Day of Education to Last a Lifetime

09-12-2012

Henry Ford College at Loughborough University was quite an appropriate venue for the 7th Annual IeMRC Conference which immersed attendees in a sea of information. Technical Editor Pete Starkey provides in-depth coverage of all presentations given, covering an amazing range of PCB fabrication, design, assembly and packaging, and military/aerospace topics.

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An Inside Look: UK's Hayling Island ICT Seminar

09-07-2012

Thankful for a respite from three months of miserable English summer weather, over 100 printed circuit enthusiasts made the journey to attend the Institute of Circuit Technology (ICT) Seminar in Hayling Island, now firmly established as the venue for a not-to-be-missed annual event on the PCB industry's technical calendar. Pete Starkey details the presentations made.

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2011

An Inside View: The Wurth Elektronik Design Conference

10-19-2011

I spent many years as a PCB fabricator actively encouraging designers to try to understand what we could and could not achieve, what was cost-effective and what not, and to involve us in discussion at the earliest possible stage of the design project. The recent Wurth Elektronik Design Conference in Manchester, UK, seemed to share this objective!

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2010

IeMRC Conference in UK: Five Years of Innovation

09-27-2010

Our European Technical Editor Pete Starkey recently made the journey to Loughborough, UK to attend IeMRC's fifth-annual conference. He reports on a myriad of topics and new technologies addressed, including: Flip-chip bonding; packaging materials for high-temperature electronics; maskless electrochemical pattern transfer in micro-fabrication; and the electrical and morphological characteristics of PEDOT:PSS.

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Adventures in Non-Conformance at SMART Group Seminar

01-26-2010

With Rockwell Collins' high-reliability, flight-critical equipment, non-conformance is a non-starter. Doug Pauls and Dave Hillman of Rockwell Collins shared case studies in non-conformance during their recent SMART Group Seminar keynote address.

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2009

Institute of Circuit Technology's Darlington Seminar a Success

11-05-2009

An enthusiastic audience, and speakers from as far afield as Japan, Germany, Scotland and Cumbria, gathered to share the latest knowledge on high-speed laminates and advanced conductor finishes at ICT's Circuit Technology Seminar on Tuesday.

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Bulk High-Temperature Superconductors for High Field Apps

09-15-2009

At the fourth annual IeMRC conference, David Cardwell, Professor of Superconductor Engineering at the University of Cambridge, gave a presentation illustrated with live demonstrations of magnetic levitation accompanied by dramatic smoke effects from the liquid nitrogen he used to cool his superconductor samples.

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Glass as an HDI Substrate?

09-02-2009

Have you ever considered glass as an HDI substrate? At a recent symposium, Dr. David Hutt of Loughborough University described work being carried out by his team to investigate the practicability of using glass as an alternative to organic substrates in the fabrication of multilayer HDI devices.

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SMART Group Seminar on Materials and Finishes

05-01-2009

"I never realised it was this complicated!" That was just one of the comments overheard during Tuesday's SMART Group seminar on printed circuit materials and finishes, held in Arundel on the south coast of England.

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EIPC Winter Conference Review

02-23-2009

It's rough out there right now. But, as attendees discovered at the EIPC Winter Conference in Amsterdam, many European PCB makers are continuing to innovate through the down cycle.

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The A-Z of Lead-Free Reliability: SMART Group workshop at NPL

01-23-2009

The NPL recently hosted a workshop entitled "A-Z of Lead-Free Reliability," organised under the auspices of SMART Group, which provided the opportunity for members of Hunt's team to update a full-house audience of electronics industry professionals on a series of current NPL investigations and studies, many of which were Joint Industry Projects with external partners.

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2008

Inside the Orbotech European PCB Executive Forum

07-21-2008

Orbotech has evolved in two dimensions--deeper into technologies related to PCB engineering, imaging, inspection, repair and process control and broader into applications in flat panel displays, PCB assembly, recognition solutions and medical imaging.

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Flying Start for National Electronics Week

06-20-2008

With the underlying theme of "Learning & Discovery," NEW brought together over 350 exhibitors to present the latest innovations in electronic design, silicon, hardware systems, software design, components, test tools, assembly equipment, production systems, contract manufacturing services and distribution.

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Europe Update: The 2008 EIPC Summer Conference in Dresden, Germany

06-06-2008

An international audience--83 delegates from 13 countries--of decision makers and leaders of the packaging and interconnection industry, met to exchange information on market trends and technical innovations and enjoyed an intensive program of 23 expert presentations over two days.

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Review: The 34th Annual Symposium of the Institute of Circuit Technology, June 2008

06-05-2008

The 34th Annual Symposium of the Institute of Circuit Technology had a distinctly Scottish flavor. The venue for the symposium was Tweed Horizons on the Scottish borders and the keynote speaker was Dr. Peter Hughes OBE, Chief Executive of Scottish Engineering, who spoke with infectious enthusiasm about the opportunities that exist in Scotland's electronics industry.

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