In last month’s column, I introduced the 10 fundamental rules of high-speed PCB design. The first rule was to establish design constraints before commencing the design. This prime strategy sets constraints upfront based on pre-layout analyses or recommendations and guidelines and is integral to the design flow to maintain the established requirements. This month, I will elaborate on the importance of controlling the impedance and floor planning the placement based on connectivity.
II. Control the Impedance: Match the transmission line impedance to the driver and load. Create the stackup and define terminations to match the impedance.
For perfect energy transfer, the impedance of the driver must match the transmission line—assuming there is a high-impedance load. A good transmission line is one that has constant impedance along the entire length of the line, so no mismatches result in reflections.
Digital design typically uses a characteristic impedance of 50–60 ohms. However, this value becomes more critical as the edge rates increase. Different technologies also have specific impedance requirements. For example, Ethernet is 100 ohms, USB is 90 ohms differential, DDR2 memory is 50/100, and DDR3/4 is 40/80 single-ended/differential impedance. Thus, controlling impedance simultaneously on each signal layer with many different technologies can become a challenge. Further, as operating voltages decrease, the associated noise margins also decrease, which makes it even more critical to match the impedance. Figure 2 shows differential pairs set up to accommodate three different technologies on the same layers of the substrate.
Notice how the signal traces are tightly coupled to the reference planes. This helps prevent unwanted radiation, particularly on the outer microstrip signals. The center dielectric material (between layers 5 and 6) is also very thin (2.3 mils) and provides low-impedance planar capacitance to the power distribution networks (PDNs).
Unfortunately, drivers do not have the same impedance as the transmission line (typically 10–35 ohms), so terminations are used to balance the impedance, match the line, and minimize reflections. Reflections occur whenever the impedance of the transmission line changes along its length. This can be caused by unmatched drivers/loads, layer transitions, different dielectric materials, stubs, vias, connectors, and integrated-circuit (IC) packages. By understanding the causes of these reflections and eliminating the source of the mismatch, a design can be engineered with reliable performance.
To read this entire column, which appeared in the October 2018 issue of Design007 Magazine, click here.