As digital systems evolve and demand for new technology pushes the envelope for smaller and faster systems, transmission line losses, previously considered to be negligible, are becoming a primary design concern. Pragmatic effects such as frequency-dependent losses come into play at clock frequencies above 1 GHz and are of particular concern for fast rise time signals, with long trace lengths, such as multigigabit serial links. This frequency dependence causes rise time degradation and reduces the upper bandwidth of the signal resulting in reduced channel data transfer. In this month’s column, I will look at the impact of transmission line losses on signal integrity.
In an ideal world, where transmission line losses are independent of frequency, the entire signal waveform would uniformly decrease in amplitude, over distance, and the rise time would remain constant. This reduction in amplitude could easily be compensated for by applying gain (cranking up the volume) at the receiver. However, in practice, as signals propagate along a lossy transmission line, the amplitude of the high-frequency components is reduced, in magnitude, whereas the low-frequency components are unaffected. This selective attenuation of high-frequency components is the root cause of intersymbol interference (ISI) and collapse of the signal eye.
The capacitive and inductive properties of the transmission line do not, in themselves, absorb the high-frequency components of the signal but rather, the energy is reflected back to the source creating ringing and overshoot unless absorbed by a source termination.
To quantify the RF losses of a transmission line, one needs to consider the attenuation of each mechanism that can be broken down into at least four major components that are accumulated: metal loss, dielectric loss, conductivity of the dielectric and stray radiation.
The flow of charge through a material causes energy dissipation. The loss in both microstrip (outer layer) and stripline (inner layer) conductors may be broken down into two components: DC and AC losses. DC, in this context, is anything below 1 MHz. Although DC losses are not generally applicable to high-speed design, resistive drops can encroach on logic threshold levels and noise margins of multi-drop systems such as long DDR3/4 address, command and control bus routing associated with SODIMM memory modules. However, on-board memory has typically less than three inches of signal length, and as such does not exhibit this issue.
To read this entire column, which appeared in the July 2017 issue of The PCB Design Magazine, click here.