The selection of a flux and cleaning process determines, to a large extent, the manufacturing yield and product reliability of electronic assemblies. In Part 1, I discussed various types of fluxes and why we use them, followed by various types of cleaning materials and processes. In this column, I will discuss cleanliness requirements to know whether the boards have been cleaned enough to meet their functional requirements for their intended applications.

I will discuss the cleanliness requirements in two parts. First, I will summarize the industry requirements as established in the latest industry standards, IPC 610 Rev H, and J-STD-001 Rev H, followed by my recommendations for cleanliness requirements without violating industry standard requirements.

Industry Cleanliness Requirements
Among many other requirements such as setting up accept/reject criteria for solder joints, IPC 610 and J-STD-001 also establish cleanliness requirements for electronic assemblies. Here is what the latest revision (Rev H) of IPC 610 and J-STD-001 have to say about cleanliness requirements. Please note the use of the term shall instead of should in the standards to avoid confusion.

General Industry Cleanliness Requirements
As is the case for many other quality acceptance requirements, IPC has essentially left it to the users and suppliers to determine the cleanliness requirements. I will highlight some of the major points in the standard (IPC 610 H and J-STD 001 H).

“Unless otherwise specified by design, or by the User, the acceptability of the residue condition shall be determined at the point of the manufacturing process just prior to the application of conformal coating, or on the final assembly if conformal coating is not applied.”

The requirement is essentially based on process control parameters, since changes in manufacturing materials or process parameters may detrimentally end item residue levels and product reliability, which may necessitate re-qualification. Manufacturing materials and/or process changes fall into two categories: major or minor, with major changes requiring validation, and minor changes with supporting objective evidence.

Qualification testing is generally considered to be more extensive in nature. Minor changes with supporting evidence are generally lesser efforts, involving shorter duration SIR tests or focused chemical characterization tests.

Again, the standard specifies that the degree of process change and associated required notifications of change are left to be established between manufacturer and user. However, IPC does provide some practical guidelines as to what to do. Here are some examples:

1. You should not have discernible residue, but flux residues from no clean fluxes are acceptable.
2. However, flux residues that inhibit electrical testing or visual inspection are not acceptable.
3. Similarly, dull appearance is acceptable but colored residues or rusty appearance are not acceptable.
4. Any foreign objects that potentially may be conductive are not allowed especially if they violate minimum electrical spacing requirements.
5. White residues which may contain chlorides and cause corrosion are not acceptable.

Here are some more guidelines in the standard:

“Unless otherwise specified by the User, the Manufacturer shall qualify soldering and/or cleaning processes that result in acceptable levels of flux and other residues. Objective evidence shall be available for review. The use of extraction testing, i.e., ROSE, IC, etc., with no supporting objective evidence shall not be used to qualify a manufacturing process. 

“Supporting objective evidence shall be test data and/or other documentation demonstrating that the performance of the actual hardware is not adversely affected under conditions anticipated in the service environment. This may include:

1. Surface insulation resistance (SIR), possibly in combination with ion chromatography testing, to demonstrate acceptable levels of residue. (Author’s note: However, no specific value is mentioned as to what the SIR value should be. I will provide some numbers as to what that should be based on historical data as to what you can expect if you follow some common process control.)
2. Historical evidence, including field returns, warranty service records and failure analysis, demonstrating that ionic and other residues on delivered products have not caused failures in service.
3. Electrical testing results, with power on, during extremes of temperature and humidity, which simulate the end use environment. Electrical failures should be subjected to failure analysis to determine whether ionic or other residues have caused the failure. This testing may occur during product qualification or outgoing acceptance testing. Rework processes shall be included in the process qualification.

“When it comes to visible residues, the requirement is that assemblies subjected to cleaning processes shall be free of visible residues. However, the visible residue requirements are established between Manufacturer and User.”

The bottom line is, IPC leaves it up to users and suppliers to establish mutually acceptable requirements based on the applications for their products. The standards also provide some references and white papers for additional guidance that users and suppliers may decide to use to establish their requirements. What it boils down to is that different users and suppliers can have different cleanliness requirements for the same applications and same products. I am not sure if that is a good thing.

My Views on Cleanliness Requirements
As discussed above, IPC does not tell you what the specific cleanliness requirements should be. But it does give a roadmap as to how to go about establishing the requirements. As noted earlier, IPC does have some very specific requirements when it comes to visually acceptable residues such as flux, white residues, and foreign objects, things you can visually see. However, when it comes to specific cleanliness requirements such as surface insulation resistance or micrograms of solvent extract requirements, you are on your own. 

Many would argue that the solvent extract test is relevant only for rosin. That must have been the reason for making the change in the J-STD-001, going as far back as 2005 when revision D was released. Now, more than 15 years later in 2021, we have revision H and the requirements for cleanliness are the same even though we have now more widespread use of components with practically no gap between the bottom of the component and the top of the board. But what have we been doing for the last few decades, starting in the 1980s? You guessed it: Solvent extract (aka ROSE), and I am talking about this test being used for all kinds of fluxes and all kinds of applications.

In addition to solvent extract, another test method that has been used extensively is surface insulation resistance (SIR). Previously, the industry used aggressive water-soluble fluxes; an SIR value of 500 MΩ/square (per square and not per square inch) on a production board under chip components, on a sampling basis, was the acceptance criteria. When I was at Intel, this test helped us discover many problems, such as poor adhesive cure profile that was trapping flux due to voids in the adhesive. We also had to make sure we didn’t ship any product with corrosion potential in the field.

The argument for not specifying a cleanliness requirement for RE and OR fluxes is that you cannot possibly develop acceptance criteria with repeatable test methods when you don’t really know what kinds of substrates, solder masks, and coatings these fluxes will interact with in some unknown environment. This argument may be valid, but we can ask the same question when it comes to RO fluxes. Besides, this problem can be solved by being more conservative and accommodating RE and OR fluxes in a very humid environment, as we have done for R0 fluxes. We can make an exception for applications where you are sending a manned mission to Mars, and you can afford to do all kinds of tests in the book if you are using RE and OR fluxes. But we are not all sending the assemblies to Mars.

If you are going to have a corrosion problem, does it really matter which kind of flux it came from? For example, you can have a corrosion problem from rosin flux if you use it generously for rework, leaving behind lots of flux that was never heat activated to become benign.

Recommendations for Cleanliness Requirements
Based on data over multiple decades now, my sense is that there are three simple requirements that should be considered (and may be given the force of an industry standard such as J-STD-001 and IPC 610 in future revisions).

1. There should be no visible flux residue except for some no-clean flux residue. But there should be no white or corroded-look appearance no matter what kind of flux residue is on the board.
2. Because solvent extract (ROSE) is commonly used, the 10.06 µg/in² that has served the industry for so long should be used for all fluxes. However, if users and suppliers agree, they can use some other test, such as ion chromatography (IC) or other mutually acceptable tests, and the level of NaCl equivalent from 2.5 to 4.5 µg/in being used by some companies for IC.
3. The most important criteria, at least to qualify the flux before use, the surface insulation resistance value taken in a humidity chamber at 100 VDC should be 500 MΩ/square to detect any trapped flux under components with practically no stand-off.

Of the three tests, given the fact that there is widespread use of low stand-off components such as BTC, LGAs and fine pitch QFPs with practically no stand-off (almost no gap between the bottom of the components and the top of the board), SIR test is the most reliable test. If there is any flux trapped under the components, SIR value will not meet the 500 megohm (10 to the power 8) requirements. Most boards, when properly cleaned, will show cleanliness as high as 10 to the power 12 or more, no matter what flux is used. There should be two SIR patterns on the board (on production boards for products meant for critical applications). One of those patterns will be covered with the components with lowest stand-off and the other pattern should have no component on it. This will serve as a control since you should always get very high SIR value as there should be no flux at that spot. Please refer to SIR pattern guidelines as discussed in the referenced chapter¹.

Finally, itmust be noted that there is no such thing as the best flux, the best cleaning method, or the best method for determining cleanliness. These variables depend on the application. Thus, using the guidelines discussed in this column, the user must establish requirements for flux, cleaning, and cleanliness testing based on empirical data for a particular application. This means that the cleanliness tests (SIR, solvent extraction, and visual) should be performed on cleaned randomly-selected assemblies as a check on the process. There is no substitute for good process control because, if a bad board passes the cleanliness test, the failed assembly lot cannot be recalled, recleaned, or retested.

References

1. Ray Prasad, Surface Mount Technology, Principles and Practice, second edition, Figures 13.13, 13.14 and 13.15.

 This column originally appeared in the October 2021 issue of SMT007 Magazine.