Trouble in Your Tank: Training Your Team and Tools for Success

Introduction
While this month’s column departs somewhat from my usual topics, the subject matter is no less critical. As someone who has been troubleshooting and problem solving for many years, I have found that the process and tools are extremely important.

I was asked to consider addressing the topics of optimizing business processes and strategy, process optimization, and training your team. I believe developing critical thinking skills will help engineers troubleshoot technical issues and bring them to a quick resolution as this is certainly a good lead-in to training your team.

Troubleshooting 101
This should come as no surprise to those of you who read my monthly columns or have met me in your circuit board facility: Remember, time is money. The longer a problem goes unresolved the more money, and certainly future customer goodwill, can be lost. When being called on to solve technical issues—whether it be a delamination situation, copper plating failures, or solderability defects—I stress a few simple rules:

  1. Walk the line and watch the operators in action.
  2. Review documented work procedures.
  3. Check rinse water quality and dwell times—are you rinsing away the contaminants or simply dragging them along with the boards to the next critical process?
  4. And the biggest sin: “Yes, everything in the chemistry is being controlled per datasheet.”

6S methodology is not new. The process is focused and disciplined. The process is DMAIC[1]: Define­–Measure–Analyze–Improve–Control.

Use various tools, including Pareto charts, histograms, process control charts, and fish-bone diagrams. Use logic; think critically and strategically. Basically, it is quite simple: Develop the troubleshooting skills necessary to solve process problems efficiently.

The rule of thumb is to keep the troubleshooting project as manageable as possible. Brainstorm to understand the linkages in the upstream and downstream processes and potential effects of process variation in these process steps. Gather all pertinent information including SPC charts, temperature logs, analysis records (including records of calibration and analytical standards), and the like. Then develop a cause-and-effect diagram. Fishbone diagrams serve this purpose well. At the risk of having hundreds of factors to investigate, only the most likely causes should be investigated first. This is where experience and critical thinking skills come into play. This will serve to weed out those processes that are not contributing to the defect.

When was the process audit performed, and on what operations within the PWB fabrication operation? Ongoing process audits jointly and separately performed by your supplier and designated individuals in the fabricator’s facility should be standard operating procedure. Process audits alert the manufacturer if a process is “drifting” out of the control window. Suggest your company select an experienced group of operators, engineers, and other science disciplines to be trained in the art of conduct a process audit.

Table 1 shows an example of one such checklist.

Carano_Table_1_cap.jpg
A fishbone diagram is another extremely useful tool to conduct root cause analysis of the problem[2]. Your team can use the fishbone diagram (Ishikawa diagram) to explore the potential causes of a particular issue or defect. After brainstorming some ideas and looking for possible linkages, sort them into groupings to better understand the root cause of the problem. A fishbone diagram is particularly useful when you don’t have very much quantitative data available, and can only rely on your team’s experience. Fishbone diagrams show possible linkages among the critical aspects of machines, materials, people. See an example of a fishbone diagram in Figure 1.

Carano_Fig_1_cap.jpg
Once the team has set up its test plan based on a narrowing of potential causes, the divide-and-conquer approach will aid in the efforts. For example, if one suspects that thin plating of copper in the hole is caused by problems associated with the electrodeposition process, simply processing the PCB in the acid copper plating solution for the required time and current density should tell whether the copper plating process or the equipment (copper plating anodes, rectifier, or electrical connections, etc.) are the cause. If not, then one must examine the previous steps. Did anyone check the cables leading from the power supply to the plating cell? Are there Carano_Fig_2_cap.jpgresistance issues with the plating racks or other connections that may cause less current to flow into the cell (Figure 2)? Are there discontinuities in electroless copper deposit or direct metallization process causing thin plating? Are there voids in the vias that have not yet been detected? These are just some of the questions to be asked. Only a systematic approach will help solve problems expeditiously.

Other Essential Skills
There are a few other skills (what we call soft skills) that I see as being absent in many of the facilities I visit. Here are a few of these critical soft skills that one needs to learn:

Design of Experiments

First and foremost, understand how to design an experiment (DOE). This requires brainstorming and certainly a team approach to solving the problem. DOE methods are for engineers to employ during experimentations. Whether it is “problem solving” or “process development,” the DOE experimental methods provide the most efficient means of determining the correct answers, and it is critical for troubleshooting. It also helps one understand those variables that are weighing more heavily on the issue and those that are of little consequence.

Start with a brainstorming session and construct a fishbone diagram or something similar. This will help put in perspective the possible causes of the problem you are seeing. From there, focus on the most likely causes of the defect, then design the experiment to investigate the most likely causes.  

TQC/Six-Sigma/Statistics/Curve Fitting

Total Quality Control and Six-Sigma (6S) is the philosophy of continuous improvement through statistical techniques and a commitment to excellence. The PDCA process (Plan-Do-Check-Act) is a central theme using the nine basic tools (cause-effect, process flow, Pareto, scatter, histograms, process capability index, control charts, time-series, and check sheets). A useful book is the free Statistical Engineering Handbook available for download from NIST[3]. A fundamental place to start is with "Select the Right Statistical Tools" (Measurement System Analysis, SPC, Comparative Methods or DOE).

FMEA
FMEA is the failure mode effect analysis[4] and is critical for problem solving. The link in the reference provides an in-depth overview of FMEA.

An example of just one failure mode related to use of an innerlayer bonding process is shown in Table 2. Of course, there are multiple process steps to consider. Here for purposes of illustration, we only show issues related to lack of uniformity of the coating appearance. Note that the higher the value in the severity column, the greater the effect on the defect.

Carano_table_2_cap.jpg
Certainly, there are additional skills I would recommend, including improving one’s technical writing skills. However, what about acquiring additional skills related to PCB fabrication and assembly? This is where IPC comes in.

IPC Standards and Certification
Preparing your workforce to successfully face challenges inherent in today’s complex manufacturing environment may be the most important investment management makes. Certainly, equipment and automation are significant investments. However, without a well-trained workforce, these investments will be very slow to pay off.

This all starts with the standards. Why use IPC standards? First, adoption of IPC standards across the electronics industry supply chain enhances the quality and the reliability of electronics products. Adoption and use of IPC standards drive quality of the finished product as well as the consistency of the processes used in the fabrication of the device including printed circuit board and printed circuit assemblies. Train your employees in the understanding and use of these workmanship standards. When you build product to IPC standards, there are several other quantifiable benefits to your business. These include:

  • Increased customer satisfaction
  • Improved production efficiencies
  • Improved final yields
  • Improved workforce performance

A hidden benefit of improved workforce performance is that the employees associated with the process gain a deeper connection to their job and gain additional pride in what they are doing. When you have a high-quality and consistent manufacturing process, yields go up, product is delivered to the customer on time and in full, and rework is minimized.

IPC has multiple workforce training programs available in various formats including in-person training and through IPC Edge[5] (the online educational and training portal of IPC).

While this article only brings to light several of the critical skills and tools required for optimizing performance, there are other skills and tools that at some point should be considered. However, if one can acquire or improve on the skills we outlined here, one will achieve a much deeper understanding of critical aspects of the printed circuit board fabrication process and in turn ensuring the product is of the highest reliability. As always, understanding linkages between processes, materials, and manufacturing operations will provide the team with more effective and efficient problem-solving resolution.

References

  1. https://www.leanscape.io/dmaic-model/
  2. The Fishbone Diagram (Ishikawa Diagram)
  3. Statistical Engineering Handbook
  4. Failure Mode Effect Analysis
  5. Homepage | IPC Edge Training

This column originally appeared in the May 2021 issue of PCB007 Magazine.

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2021

Trouble in Your Tank: Training Your Team and Tools for Success

05-27-2021

Columnists were asked to consider subjects such as optimizing business processes and strategy, process optimization, and training your team. From my view, developing critical thinking skills will help engineers troubleshoot technical issues and bring the issue to quick resolution, as this is certainly a good lead in to training your team.

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Trouble in Your Tank: Plating Anomalies and Defects—Part 2

04-26-2021

One of the most difficult things about trouble shooting PCB defects is getting to and understanding the root cause of defects. Many of these defects have can have multiple origins. And many may not manifest themselves in the process where the defect actually occurred.

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Trouble in Your Tank: Process Defect Anomalies-Part 1—The Case of Etch Resist Attack

03-29-2021

Troubleshooting process related defects is not as simple an exercise as we would like to believe. The printed wiring board fabrication process is a complex set of mechanical and chemical processes containing multiple steps. When even one of the process steps is not in control, end results can be disastrous. For now, the author presents a view of some defects that at first glance the origins are not obvious.

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Trouble In Your Tank: Process Management and Control—Benchmarking Best Practices

02-19-2021

Minimizing defects and improving yields is especially important as the technology is becoming ever so complicated, and additional focus must be placed on yield improvements. This is where process management and control must be front and center.

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Trouble in Your Tank: A Process Engineer’s Guide to Etching Defects-Part 3

01-21-2021

While troubleshooting everyday processing issues, final etching touches on many downstream processes. These include surface preparation, imaging, and copper surface quality. There are concerns with the etching process itself and how process issues and operating parameters impact the circuit formation quality. In this month’s edition of “Trouble in Your Tank,” the subject of etch-outs, undercut, and linewidth reduction will be presented.

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2020

Trouble in Your Tank: A Process Engineer’s Guide to Final Etching, Part 2

12-30-2020

In last month’s column, Michael Carano presented various etching defect causes related to equipment parameters. In this month’s column, he discusses various other causes that lead to etching defects.

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Trouble in Your Tank: A Process Engineer’s Guide to Final Etching, Part 1

11-20-2020

Sure, etching of copper foil has been in existence since before through-holes were mechanically drilled. However, as circuit density has evolved into finer and finer lines and spaces, the mechanical and chemical aspects of etching copper have evolved as well. Michael Carano provides an overview of the inner layer and outer layer etching process, including chemical and mechanical aspects of the process, different chemical formulations involved, and other unique aspects of each.

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Trouble in Your Tank: A Process Engineer’s Guide to Surface Prep and Dry-Film Photoresist Adhesion

10-23-2020

One cannot underestimate the importance of surface preparation of the copper surface and its relationship to dry film adhesion. Michael Carano explains why chemical cleaning methods are favored over mechanical methods as long as copper removal rates are reduced and excessive surface roughness is avoided.

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Trouble in Your Tank: A Process Engineer’s Guide to Interconnect Defects

09-29-2020

For those associated with PCB fabrication, one of the biggest nightmares is often the infamous interconnect defect (ICD). Essentially, an ICD is a separation of the plating from the interconnect foil. In this column, Mike focuses on Type 1 ICD and D-sep.

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Trouble in Your Tank: A Process Engineer’s Guide to Electroless Copper

08-29-2020

Mike Carano highlights electroless copper plating solutions, focusing on a copper formulation based on copper chloride, EDTA, formaldehyde, and sodium hydroxide.

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Trouble in Your Tank: CAF Formation—Correction of Misrepresentation of Origins and Causes

08-11-2020

In Mike Carano's words, "In my April 2020 column in PCB007 Magazine, I incorrectly misrepresented the origins and causes of conductive anode filament (CAF) formation. This follow-up column will provide more insight and depth of knowledge on the CAF failure mode."

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Trouble in Your Tank: A Process Engineer’s Guide to Advanced Troubleshooting, Part 2

07-31-2020

Michael Carano discusses two interesting technical problems: the case of circuit open or etch-out, which will also include circuit width reduction related to undercut, and a defect that relates to extraneous copper remaining on the board. Both issues illustrate the complex nature of PWB troubleshooting and defect analysis.

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Trouble in Your Tank: A Process Engineer’s Guide to Advanced Troubleshooting, Part 1

06-15-2020

Defects may “manifest” or be detected in or after a specific operation within the PCB manufacturing process, but the underlying root cause may have occurred earlier in the process. In this column, Mike Carano focuses on several anomalies that may have their origins in process steps not normally recognized as the root cause of the issue.

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Trouble in Your Tank: Lamination and Delamination

05-15-2020

There are many reasons to get incredibly frustrated and confused when presented with complex issues related to the PCB fabrication process. Mike Carano reviews the concerns with the possibility of multilayer board delamination and the root cause or causes of the defect.

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Trouble in Your Tank: Conductive Anode Filament (CAF) Formation

04-30-2020

Mike Carano explains how there are two additional concerns fabricators must understand and reconcile as the circuit technology continues on the high-density curve along with the plethora of new materials to meet the technological demands: conductive anode filament (CAF) formation and wicking.

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2019

Trouble in Your Tank: Never Stop Learning

12-15-2019

Michael Carano's father always said to him, "You should never stop learning," even when he was 40 years old. This lesson applies to the PCB manufacturing industry as well and is where constant learning and new skills development come into play. Mike introduces a few new things you can learn, both technical and soft skills.

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Trouble in Your Tank: Changes and Concerns Regarding HDI Technology

12-12-2019

One does not have to look too far back to point out some significant changes that have taken place in our industry over the past few years. Processes, materials, equipment, and board designs continue to change. If I were to pick one to focus on for this column, it would be in the ever-increasing trends toward higher circuit density. This relates to finer lines and spaces, smaller diameter blind vias, and even multilevel stacked and staggered vias. All of these changes will continue to place significant pressures on bare PCB fabricators to increase their investment and onboard new and critical skill sets.

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Trouble in Your Tank: Via Hole Filling and Plugging, Part 2

11-15-2019

In my previous column, I presented several options with which to accomplish blind and through-hole via filling. In this edition of “Trouble in Your Tank,” I will discuss filling blind vias and through-holes with polymeric pastes.

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Trouble in Your Tank: Working With Flexible Circuits

10-24-2019

Even though they are a smaller part of the circuit board industry, flex and rigid-flex circuits have been growing in popularity over the last decade, and for good reasons. These circuits are made to be thin, flexible, and durable. However, in addition to the opportunities that come with flex and rigid-flex circuits, there are also challenges. Find out more here.

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Trouble in Your Tank: Via Hole Filling and Plugging, Part 1

09-11-2019

High-density interconnect (HDI) demands that vias that do not contain component leads be plugged with either a polymeric paste or electroplated copper. In this column series, Michael Carano talks about the technology drivers for via filling/plugging in the context of HDI.

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Trouble in Your Tank: Moving Into Microvias, Part 4

08-06-2019

Copper deposit in the vias with electroless copper or alternatives, such as carbon-based direct plate processes to the vias, depends on process control, equipment design, and chemical parameters. When these are not in control, defects arise. In this installment of the column series, Mike Carano will talk about metallization for HDI blind via processing.

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Trouble in Your Tank: OSP Performance—Effect of Film Thickness and Microetch

05-09-2019

Two often overlooked performance attributes for organic solderability preservatives (OSPs) are the organic film thickness and the topography of the copper after microetch. Film thickness up to an extent is critical. However, the copper topography and surface preparation also play a role. Thus, you should not overlook the critical nature of the overall OSP film thickness. Read on.

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Trouble in Your Tank: Moving Into Microvias, Part 3

03-20-2019

If we have learned anything about moving into HDI manufacturing, it is that it takes a great deal of thought and discipline to be successful. Unfortunately, as the following bullet points delineate, all too often, the fabricator underestimates the scope of HDI and what this manufacturing strategy truly entails.

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Trouble in Your Tank: Surface Preparation and Cleaning, Part 3

02-28-2019

Surface preparation and cleaning are essential aspects of metal finishing and PCB fabrication. The PCB fabricator has several processes that fit the broad category of cleaning and surface preparation. However, the organization needs additional studies to enhance the broad portfolio of products for their respective fitness for use in today’s technology.

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Trouble in Your Tank: The Art and Science of Resist Stripping, Part 2

02-12-2019

Yes, there is some art to the resist stripping operation. However, it is more about the science. In a future column, I will present process control methods for resist stripping as well as dive into additional troublesome activities related to the process.

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2018

The Art and Science of Photoresist Stripping, Part 1

11-21-2018

Photoresist stripping has become a complicated process due to many unique resist formulations on the market. The first part of this column series looks at some of the most common problems in photoresist stripping, and offers strategies on how to address them.

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Trouble in Your Tank: Understanding Resist Lock-in and Extraneous Copper

10-23-2018

It happens when you least expect it. You think you have all the process controls in place to prevent issues after etching, but either copper remains where there should be none or photoresist remains on the copper.

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Trouble in Your Tank: A Tale of Zinc Tails

09-12-2018

It is a given that the zinc tail can have a negative impact on PTH thermal reliability. Therefore, it is best to understand how to minimize its formation, or at least provide a means to mitigate the negative effects of the zinc tail.

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Trouble in Your Tank: Flexible Metalization, Part II

08-16-2018

In previous columns and elsewhere in literature, concerns about electroless copper peeling from polyimide material have been reported. The main concern with is the creation of a void caused by peeling or blistering.

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Trouble in Your Tank: PTH Failure Mechanisms and Using IST as a Tool, Part 1

08-09-2018

This edition of “Trouble in Your Tank” will elucidate the difficulty of root cause defect analysis when incorrect assumptions (and thus conclusions) are made. Further, it will illustrate that when proper tools are used to study the issue, additional data is gathered that supports the actual cause of the defect.

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Trouble in Your Tank: Surface Preparation and Cleaning, Part 2

07-16-2018

Some type of cleaning and surface structuring is required in virtually every step of the printed circuit manufacturing process, from preparing the raw laminate for etch or plating resist to final assembly board cleaning before shipment. In this edition of “Trouble in Your Tank,” I will attempt to cover most of the general cleaning problems that can occur in any of these steps and, where possible, any problems unique to a specific manufacturing step.

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Trouble in Your Tank: Looking at PTH Voids

05-25-2018

Several columns have been published in this space describing the origins of voids in the plated through-hole. However, not all voiding is caused by or has its genesis in the electroless copper (PTH metalization) process.

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Trouble in Your Tank: Pits and Mouse Bites, Part 3

05-03-2018

In the first two columns in this series, the author presented two critical areas of the PCB fabrication process thought to contribute to the mouse bite and pitting defects seen in productionat a fabrication facility. In those first two parts, photoresist lamination and exposure parameters were investigated as to the possible root cause of the defects.

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Trouble in Your Tank: Surface Preparation and Cleaning, Part 1

04-17-2018

Surface preparation and cleaning are essential aspects of metal finishing and printed circuit board fabrication. The printed circuit board fabricator has several processes that fit the broad category of cleaning and surface preparation in its toolbox. It is critical that the engineer carefully evaluates these methods and processes to determine the most effective way to optimize yields.

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CASE STUDY: Pits and Mouse Bite Issues, Part 2

02-15-2018

In last month’s column, I introduced a case study that centered on plating pits and mouse bites. There were three areas in the process that raised concern as to the potential root cause of the defect. Of course, as with the case in all troubleshooting situations, it is best to look at the problem with wide open eyes. Just because one is looking at an issue that is visible after copper plating, this should not mean that is the only place to look. And this case study illustrates that point quite clearly.

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2017

Trouble in Your Tank: Moving into Microvias—The Interaction of Materials and Processes, Part 2

12-01-2017

Most of the dielectric materials that are used to make printed circuit boards incorporate reinforcement into the resin system. Reinforcement usually takes the form of woven glass fiber. Woven fiberglass is just like any other cloth, made up of individual filaments that are woven together on a loom.

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Trouble in Your Tank: The Critical Importance of Rinsing, Part 2

11-10-2017

In Part 1 of this series on the importance of rinsing, the author presented an overview of the critical aspects of rinsing as it applies to the overall quality of a printed circuit board, with considerable space devoted to water conservation. Thus, we now turn to how one can improve rinsing effectiveness without increasing water consumption and, by default, significant waste treatment costs.

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Trouble in Your Tank: Moving into Microvias—The Interaction of Materials and Processes, Part 1

08-23-2017

In the first part of a series of columns focused on microvias, the importance of adopting HDI technology as a strategic initiative for the PWB fabricator is presented. The major drivers for HDI are listed.

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Trouble in Your Tank: The Critical Importance of Rinsing, Part 1

07-14-2017

In nearly every chemical process step in the PCB industry, rinsing is an immediate and required process step. Rinsing is typically a crucial step following a chemical process, and is thought to be one that requires little or no attention to function properly. However, problems caused by ineffective rinsing are responsible for many rejects, as well as huge operating costs in the waste treatment department.

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Trouble in Your Tank: The Desmear Defect Guide

05-16-2017

Inadequate or excessive desmear will lead to several PTH defects and failures. Resin smear, ineffective texturing of the resin, and even overly aggressive desmear will contribute to poor plating, adhesion failures and a myriad of other non-conforming defects. However, proper troubleshooting protocol dictates that the engineer also looks at drilling as the contributor to these and other defects.

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Trouble in Your Tank: Copper-to-Copper Peeling

05-09-2017

Follow good shop practices in terms of surface preparation, electroless copper plating thickness and resist developing parameters. Optimal surface preparation utilizing cleaners and micro-etches is critical to eliminating copperto-copper peeling. In addition, over- and underdeveloping create their own set of process constraints. Pay very close attention to developer pH, operating temperature and break point

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Improving Solderability and Corrosion Resistance for Final Finishes, Part 1

03-16-2017

The process of forming a reliable solder joint between the component and the printed circuit board is paramount with respect to the manufacturing of robust circuit board assemblies.

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Trouble in Your Tank: Metalizing Difficult-to-Plate Substrates

02-23-2017

Metalizing materials such as polyimide used for flexible circuitry provides a significant challenge for process engineers. Conventional electroless copper systems often required pre-treatments with hazardous chemicals or have a small process window to achieve a uniform coverage without blistering.

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Trouble in Your Tank: Acid Copper Plating

02-23-2017

Electroplating a printed circuit board is by no means a trivial task. Higher layer counts, smaller-diameter vias (through-hole and blind) as well as higher-performance material sets contribute to the greater degree of difficulty with today’s technology.

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2016

Trouble in Your Tank: Via Formation and Mechanical Drilling, Part 2

12-27-2016

In this month’s installment of Trouble in Your Tank, I will further explore the critical drilling parameters required to drill a “good hole” and provide information on some little-known parameters required for this operation.

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Trouble in Your Tank: Via Formation and Drilling Mechanics, Part 1

11-28-2016

In the extensive process of printed circuit board fabrication, one of the steps involves mechanically drilling through-hole vias. Via formation is then followed by desmear and metallization. The quality of the through-hole drilling process (and by inference the quality of the drilled through-hole) or lack thereof will also impact the desmear and metalization processes.

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Case Study: Plating Nodules— Where Did These Come From?

11-02-2016

Introduction Sometimes the problems can really get pretty ugly. One would assume these uglies would be easy to correct. But most often, solving such a problem requires a much deeper dig into the process.

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Trouble in Your Tank: Case Study: Plating Nodules— Where Did These Come From?

10-13-2016

Sometimes the problems can really get pretty ugly. One would assume these uglies would be easy to correct. But most often, solving such a problem requires a much deeper dig into the process.

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Building Reliability into the PCB, Part 1

07-20-2016

Sometimes there is confusion among PCB engineers and quality managers as to what constitutes reliability. Some may say that reliability refers to avoiding PTH failures such as corner cracks or interconnect defects. Then there are those who subscribe to a wider range of failure criteria to determine whether or not the final product is reliable for long-term service.

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Primary Imaging for Pattern Plating, Part 2—Development

06-14-2016

The proper development of the primary photoresist is critical to the overall success of the imaging process and in turn the processes that follow—either etching to form innerlayers or the electroplating processes on outer layers. In this step, the unexposed photoresist (after resist lamination and exposure) is washed away via the developing process.

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Trouble in Your Tank: Primary Imaging for Pattern Plating, Part 1

05-14-2016

It is the job of the PCB process engineer to ensure that a quality circuit is delivered. This process starts with sound mechanics of the im-aging system that include surface cleanliness and resist lamination parameters.

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2015

Copper Discoloration and Other Concerns with OSP

05-18-2015

Getting the OSP process to perform as it is intended requires attention to both the equipment operating parameters as well as chemistry. This month's "Trouble in Your Tank" delves into one of the most irritating issues with respect to OSP: discoloration (read "oxidation") on critical circuit features.

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More Pesky Solder Mask Problems: Plugged Via Leading to Skip Plating

04-21-2015

Many factors are in play when it comes to preventing ink from remaining in vias. In this article, Michael Carano presents two factors: solder not flowing in the vias and the lack of a plated solderable finish in the vias. This may be because some of the vias have a final finish in them and others do not--and all of these are happening on the same boards!

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Fine Lines and Spaces with Half-Etch Processes

03-24-2015

Half-etch technology is production proven in meeting high density circuitry requirements. Thinner copper is effective in achieving sub-35 micron lines and spaces due to the total copper thickness that must be etched.

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Getting to the Root Cause - Solderability Defect Analysis

01-06-2015

In this case study, a PCB fabricator investigates the root cause of solderability defects on ENIG-processed circuits. It was determined that the fabricator, due to process errors, caused hyper-corrosion within the nickel deposit, which led to the defects.

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2014

Lead-free Compatible OSPs: What Does This Really Mean?

12-23-2014

While next-generation OSP as a final finish has become the standard for lead-free compatible assembly, one should assume that any new OSP meets the criteria. A number of simple procedures may be followed to qualify any new OSP and ensure it is compatible with these higher assembly temperatures. Columnist Michael Carano takes a closer look.

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Oxide Alternatives to Enhance LPI Adhesion to Copper

12-02-2014

The aggressive nature of the ENIG process is a particular nuisance for some aqueous-based LPIs. Simply scrubbing the copper surface prior to soldermask application is often not an effective adhesion promotion mechanism for LPI and ENIG. Before exploring surface topography further, it is important to understand outside influences such as ENIG and its effect on adhesion.

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Trouble in Your Tank: Oxide Alternatives to Enhance LPI Adhesion to Copper

12-02-2014

The aggressive nature of the ENIG process is a particular nuisance for some aqueous-based LPIs. Simply scrubbing the copper surface prior to soldermask application is often not an effective adhesion promotion mechanism for LPI and ENIG. Before exploring surface topography further, it is important to understand outside influences such as ENIG and its effect on adhesion.

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Root Cause of Failures in PWB Lamination

11-11-2014

Understanding the interactions of the materials, oxide treatment, and the lamination process will help you get to the root cause failures in multilayer fabrication. When troubleshooting multilayer defects, it is necessary to understand the effect certain process parameters have on quality and reliability. Truly, the quality of a multilayer PCB (prior to desmear/metallization) will depend on several factors presented in this column.

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Trouble in Your Tank: Root Cause of Failures in PWB Lamination

11-11-2014

Understanding the interactions of the materials, oxide treatment, and the lamination process will help you get to the root cause failures in multilayer fabrication. When troubleshooting multilayer defects, it is necessary to understand the effect certain process parameters have on quality and reliability. Truly, the quality of a multilayer PCB (prior to desmear/metallization) will depend on several factors presented in this column.

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Controlling the ENIG Process for Optimum Efficiency and Performance

09-23-2014

Ideally, the ENIG process must provide the optimum in solder joint reliability while operating at the highest level of cost efficiency. All too often, process parameters that have the most influence on these critical attributes are poorly understood.

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Trouble in Your Tank: Controlling the ENIG Process for Optimum Efficiency and Performance

09-23-2014

Ideally, the ENIG process must provide the optimum in solder joint reliability while operating at the highest level of cost efficiency. All too often, process parameters that have the most influence on these critical attributes are poorly understood.

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Oxide Alternative Processes

09-11-2014

Columnist Michael Carano writes, "It is all about optimizing the performance of the oxide alternative chemistry. This includes close monitoring of the main reactive ingredients of the process chemistry. And one of the first issues that the industry had to address, whether one is using reduced oxide chemistry or oxide alternatives, is pink ring."

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The Degrees of Nickel Hyper-corrosion and Mitigation Strategies

08-12-2014

Columnist Michael Carano presents additional information about nickel hyper-corrosion, a spike or fissure in the nickel deposit evident after immersion gold plating, by further defining the five degrees of hyper-corrosion. He also explores the root causes of such attacks on the base nickel along with strategies to mitigate these effects.

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PTH Drilling Revisited - Fundamentals, Part 1

06-19-2014

The basic fundamentals of PTH drilling revolve around several key factors: 1) speeds and feeds--drill in-feed rate and spindle speed of the drill bit; 2) surface feet per minute; and 3) the material to be drilled. Understanding and applying these first few critical factors will influence the overall quality of the drilled, plated through-hole.

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2013

Achieving Fine Lines and Spaces, Part 1

12-10-2013

Circuit designs with three-mil lines and spaces are increasingly becoming the norm. Optimizing the imaging process should be of paramount concern. Over the next few months, Mike Carano will present the critical steps in the imaging process and provide insight as to where potential yield reducing defects can occur and how to prevent them.

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Trouble in Your Tank: Optimizing the Soldermask Process, Part 3

10-29-2013

In Part 1 and 2 of this series, Columnist Michael Carano presented critical information on ink properties, methods of soldermask application, tack drying, and more. In Part 3, the exposure process is detailed, including exposure units, UV lamps, the phototool, and overall exposure energy.

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Trouble in Your Tank: Electroless Copper and D-Sep

10-22-2013

In past columns, Michael Carano presented information about the different types of ICD interconnect defect and its root causes. One key defect that was not discussed is the infamous D-sep. What exactly is D-sep? Carano will explore this issue and provide suggestions for process improvement so you don't experience D-sep on your expensive, high-reliability PCBs.

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Trouble in Your Tank: PTH Voids: Getting to the Root Cause, Part 3

09-24-2013

Achieving a void-free deposit through the PTH line need not be an elusive goal. Instead, careful thought should be given to line design and the critical interactions of chemical parameters. In addition, the fabricator and supplier must work closely to ensure high-performance materials can be processed with the highest levels of reliability.

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Trouble in Your Tank: PTH Voids: Getting to the Root Cause, Part 2

08-26-2013

Both a reduced oxide process and an alternative oxide enhance the bond strength between the prepreg resin and the copper. In addition, the treated foil, if exposed by the wedge, is better able to stave off dissolution from the many acidic process steps to which the PWB will be subjected.

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Trouble in your Tank: Optimizing the Liquid Photoimageable Soldermask Process, Part 1

07-18-2013

The soldermask is an integral part of the circuit board. The proper application of soldermask requires strict attention to detail. This first article of a two-part series elucidates the critical operational requirements of the photoimageable soldermask process.

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Trouble in Your Tank: Those Problematic Soldermask Issues

06-13-2013

Michael Carano writes, "I'm sure you've heard the words, 'It's not rocket science.' Apologies to the rocket scientists, but sometimes PCB fabrication just makes it look that way. This column approaches soldermask adhesion using an actual case study."

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Trouble in Your Tank: Negative Etchback: Is it Really OK?

06-03-2013

Negative etchback is not a non-conforming defect according to IPC-600 (within limits). Acceptable levels of negative etchback do exist; however, there is a downside that can affect the overall plating quality in the PTH.

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Trouble in Your Tank: The Root Cause of ICDs, Part II

05-21-2013

This case study from Michael Carano emphasizes the critical thinking required to solve complex technical issues related to innerconnect defect. The defect described relates to drilling and inadequate drill smear removal, as opposed to plating as the root cause of the innerplane separation.

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Trouble in Your Tank: What Pushed the Tech Envelope in 2012 and a Look at 2013

01-18-2013

With increased growth rates for HDI, lesser known technologies are being adopted, including three critical solderable finish processes: Acid copper superfilling of blind vias, paste interconnect, and direct electroless palladium over copper.

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2012

Trouble in Your Tank: Pesky Peeling & Lifting Soldermask Issues

12-11-2012

Soldermask can peel or lift off areas on a PCB for a variety of reasons. This edition of "Trouble in Your Tank" presents the causes of soldermask peeling and lifting and stresses the importance of surface preparation prior to mask application.

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2011

Trouble in Your Tank: More ENIG Process Issues & Defects

09-22-2011

In previous columns related to the electroless nickel-immersion gold process, Michael Carano focused on plating and process defects related to mostly pre-plate process steps such as poor or inadequate cleaning, micro-etching and rinsing. This month, he tackles additional annoyances that lead to scrap and reduce the confidence in the ENIG process.

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