The Plating Forum: An Overview of Surface Finishes

Surface finish R&D departments on the supplier side have been very busy coming up with new finishes to meet the everchanging demands of the electronics industry. Today, designers have wide variety of finishes to choose from: HASL (hot air solder leveling), electrolytic nickel gold, OSP (organic solderabilty preservative), ENIG (electroless nickel/immersion gold), I-Ag (immersion silver), I-Sn (immersion tin), ENEPIG (electroless nickel/electroless palladium/immersion gold), EPIG (electroless palladium/immersion gold), EPAG (electroless palladium/auto-catalytic gold), DIG (direct immersion gold), and ISIG (immersion silver/immersion gold). In addition, most finishes offer variations within their process; specifying thickness of the layers and the type of electrolyte is used to meet specific performance criteria.

Historically, HASL was among the first finishes that saw wide use as a solderable finish. HASL was accompanied by tin-lead reflow where it was suitable, as long as tin-lead soldering remained the primary assembly method. Both HASL and tin-lead reflow required a thermal excursion. The technology (mostly double-sided) at that time could tolerate it.

OSP was introduced as a simpler, faster, and safer procedure. OSP gained market share as long as the primary assembly method required only a single excursion to tin-lead reflow temperature.

With the introduction of SMOBC (solder mask over bare copper), the dominant finishes were HASL and OSP for pads and electrolytic nickel/electrolytic hard gold for contacting fingers.

As MLB (multilayer boards) and surface mount were introduced, HASL topography (lack of planarity) became a problem at assembly as the pad size continued to shrink. ENIG and OSP became the better choices. ENIG had the advantage over OSP in that it withstands multiple thermal excursions required at assembly. ENIG was also aluminum wire bondable and a good metallic contacting surface. All these advantages justified the higher cost and complexity of processing associate with ENIG.

For a few years, ENIG, HASL, OSP, and electrolytic nickel gold were the staple for the industry, with HASL and OSP for simpler products that require a single thermal excursion at assembly. ENIG was the choice for surface mount and BGA (ball grid array) used for surface mount, where co-planarity was paramount. Electrolytic nickel gold was used to plate hard gold over nickel for insertion fingers and with a thicker, soft gold layer it was the choice for gold wire bonding.

With the introduction of lead-free (LF) solder—an example is SAC 305—the reflow temperature was increased from 230oC to 260 oC. Standard OSPs could not withstand the reflow temperature of LF solder and a new generation of high temperature (HT) OSPs came to the market. This class of OSPs could withstand the increased reflow temp of LF solder and was capable of withstanding multiple thermal excursions.

In the same time frame, the industry saw the introduction of immersion silver and immersion tin. Immersion silver (a metallic surface finish) is a solderable, coplanar contacting surface. Although silver had some limitations like tarnishing and creep corrosion, it has its place with certain process modifications to contain tarnishing and creep corrosion. Immersion tin became a viable finish, particularly for press fit type connectors where its lubricity came in play. Of course, it was solderable for LF solder. For immersion tin, the IPC specified a thick layer (40 µin or one micron) to counter the natural tendency to form an IMC (copper-tin intermetallic) on storage or thermal excursion. If the IMC works its way to the surface it would render the surface non-solderable.

With continued miniaturization, electrolytic nickel gold for gold wire bonding became a problem as it required electrical continuity through bussing. There was a need for a gold wire-bondable surface that was non-electrolytic; this resulted in the development of the ENEPIG (electroless nickel, electroless palladium, immersion gold) surface finish. The palladium layer between the nickel and the surface gold is a diffusion barrier to the migration of nickel to the surface, which can create bond failures. ENEPIG offered all the advantages of ENIG plus gold wire bonding.

As the use of wireless networks and handheld devices continued to grow, massive data is transmitted through printed circuit boards in the form of high frequency RF signals. It became clear that the electroless nickel layer in ENIG and ENEPIG will create signal loss. This brought about the development of nickel-free surface finishes. At present there is commercially available EPIG and EPAG, both nickel-free. Another finish that fits the bill is thicker DIG. I wrote about DIG in a previous column. A new addition to this group is ISIG, which is presently under development.

On the manufacturing end, board shops choose the surface finishes they offer to their customer base. The newer finishes that are in limited demand are relegated to contract plating shops. These shops offer a wider variety of surface finishes to the board shop, which will, in turn, subcontract their services. As the demand increases, the board shop will eventually set up the capability in house.

Designers have a lot of choices where they balance availability, cost, manufacturability, and performance. In some instances, specific finishes are the only option (for example, nickel-free finishes for RF signal propagation). Designers also must specify the thickness that would meet their design criteria.

The IPC Plating Committee has put out specifications for ENIG, I-Ag, I-Sn, and ENEPIG. In the specifications, a thickness range for the different layers is included, as well as performance criteria. Designers can call out the IPC specification in lieu of specifying thickness and performance. It is important to note here that designers have the option of taking exception with any parts of the specification. Such exceptions are noted in the design drawings.

All the finishes discussed here have big pluses as well as certain limitations. All the finishes are in use today. Hardly any have been obsoleted. Simpler board designs and performance expectations are readily met by simpler finishes like HASL, I-Ag, I-Sn, and OSP. The more sophisticated designs require more complex finishes like ENIG, ENEPIG, EPIG/EPAG, DIG, and ISIG to meet the designer’s performance expectations.

This column originally appeared in the August 2021 issue of PCB007 Magazine.

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2021

The Plating Forum: An Overview of Surface Finishes

09-06-2021

Surface finishes’ research and development departments on the supplier side have been very busy coming up with new finishes to meet the everchanging demands of the electronics industry. Today, designers have wide variety of finishes to choose from. George Milad breaks it down.

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The Plating Forum: DIG—The Next Generation

06-16-2021

DIG stands for “Direct Immersion Gold.” The acronym is used to specify direct deposition of gold on copper as a surface finish. It is a metallic solderable finish. At assembly, DIG forms a Cu/Sn intermetallic with the gold layer dissipating into the bulk solder.

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The Plating Forum: RAIG (Reduction Assisted Immersion Gold) for Gold Surface Finishes

04-05-2021

RAIG was introduced a few years ago to meet the requirements of newer designs. Since its inception, more gold finishes are finding RAIG gold to be a viable alternative to standard immersion gold. RAIG gold is a mixed reaction bath that functions as an immersion gold and with the added reducing agent it also functions as an electroless (autocatalytic) bath.

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2020

The Plating Forum: Training for Plating Processes in the Electronics Industry

12-24-2020

Plating is a very old industry and has been studied for many generations. Its basic principles are well understood and documented. However, when it comes to the intricate details of plating a circuit board, there is so much to learn and apply. George Milad explains.

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The Plating Forum: Via Plating for PWBs

11-19-2020

Vias are an integral part of PWB design and manufacturing. They are the means by which different layers of a board are connected. George Milad addresses the electroplating of vias, including the three main types of vias: through-hole vias, buried vias, and blind vias.

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The Plating Forum: The Critical Role of Pretreatment for Plating

10-22-2020

Pretreatment is usually customized to the incoming substrate and the plated metal. George Milad explains how it is a critical step and must be completed before plating to achieve the desired adhesion and to enhance the quality of the deposited metal.

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The Plating Forum: Immersion Plating Reaction in Electronics Manufacturing

09-16-2020

Plating or metal deposition is a key component in the manufacturing of electronic packages (circuit boards and integrated circuits). Plating occurs when a metal ion in solution (electrolyte) is reduced to the metal. The reduction takes place when electrons are supplied to the ion. George Milad dedicates this column to the immersion reaction.

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The Plating Forum: Minimizing Signal Transmission Loss in High-Frequency Circuits

07-06-2020

All PCB materials have both conduction and dielectric RF signal losses. In this column, George Milad highlights resistive conduction losses by the copper layer used in the board.

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The Plating Forum: Can ‘Nickel Corrosion’ Occur in ENEPIG?

05-25-2020

Nickel palladium gold (ENEPIG) surface finish is being referred to as the “universal finish.” ENEPIG was also the answer to the nickel corrosion “black pad” encountered occasionally with electroless nickel/immersion gold (ENIG) deposits. In this column, George Milad answers the question, "Can 'nickel corrosion' occur in ENEPIG?"

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The Plating Forum: Eliminating Waste From Electrolytic Acid Copper Plating

03-15-2020

Acid copper plating in most shops is done in vertical plating tanks. Acid copper solutions are not dumped but are continuously used with occasional carbon treatment to remove organic build-up from the additives and from dry film leaching. George Milad explains.

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The Plating Forum: EPIG—A Nickel-free Surface Finish for Next-generation Products

01-11-2020

In recent years, electronic devices, such as smartphones and tablet PCs, have been miniaturized. Chip-size package (CSP) used inside the electronic devices have been miniaturized as well, and the spacing between the lines continues to diminish every year. Some of the latest packages have spacing as little as 15 µm or less. If electroless nickel electroless palladium immersion gold (ENEPIG) is used with an EN thickness of 5–6 µm, only 5 µm of spacing would be left, increasing the risk of shorts between the traces. George Milad explains.

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2019

The Plating Forum: New Developments in ENIG

12-08-2019

ENIG has been around the printed circuit industry for more than 25 years. George Milad provides an update and explains how although the occurrence of corrosion was recognized, a better understanding of the defect has led to a series of improvements over time.

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The Plating Forum: Update on IPC-4552 ENIG Specification Revisions

10-20-2019

George Milad's columns will cover PCB plating, IPC specifications, and more. In this debut installment, he gives us an update on the IPC-4552 ENIG specification, including Revision A and B.

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2014

The Plating Forum: Wire Bonding to ENIG

03-05-2014

The IPC-4552 ENIG specification was written in 2002, but the committee is currently updating and revising the document. The thickness of the immersion gold layer is being revised with the intent of reducing the minimum thickness from 2.0 µin to 1.6 µin. A series of studies were conducted to find out if this reduction is possible.

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The Plating Forum: ENIG and the Plating Process

01-07-2014

ENIG continues to gain market share due to its versatility in a wide range of component assembly methods including solder fusing, wave soldering, and wire bonding. The plating of ENIG is a complex multi-step process. Each process step is carefully designed and must be well understood and controlled to produce the desired end product. George Milad reports.

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2013

Acid Copper Plating for High Aspect Ratio and Via Fill

07-16-2013

To meet new specification requirements, board shops are forced to seek new and advanced processes in every department. Acid copper plating comes under heavy scrutiny, as it is the process that forms the traces and the through-hole connectivity that conveys the signal from end-to-end of the final device. George Milad, a new columnist for The PCB Magazine, explains.

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