Reading time ( words)
Printed circuit board history stretches back to the early 1900s, with real promise shown in the industry after World War II. Through the 1940s, 1950s, and 1960s, PCB construction really started to progress when fiberboard and wood were replaced with resins and laminates, and rivets replaced early plated through-holes. As the industry grew, IPC, the worldwide printed circuit board trade association, had its first meeting in the late 1950s.
It was around this same time that the idea of testing printed circuit boards became a real discussion topic, and one of the first tests explored for helping to determine the robustness of a PCB’s construction was thermal shock. The premise is quite simple: apply stress and strain to the PCB via exposure to hot and cold temperature extremes.
One of the first methods developed for this type of testing, but geared more towards any type of test sample, was MILSTD-202, method 107—Thermal Shock. The method’s purpose statement provides a perfect depiction of what the test was designed to do: “This test is conducted for the purpose of determining the resistance of a part to exposures at extremes of high and low temperatures, and to the shock of alternate exposures to these extremes, such as would be experienced when equipment or parts are transferred to and from heated shelters in arctic areas.”
Further inspection of the test document describes thermal shock testing with the use of both environmental chambers as well as liquid baths. For the latter topic, the method even provides some guidance as to what type of fluid can be used, as water is obviously not a suitable fluid for all the temperature test conditions that are listed. Also in the document is a table which provides some knowledge about dwell times. The dwell time is the duration that the test specimen is exposed to a given temperature extreme and should be sufficient in length to ensure that the test specimen reaches the desired extreme temperature. The table itself provides some guidance on this topic relating the dwell time to the test sample’s weight. I would highly recommend perusing this table to educate yourself on the industry-accepted durations.
Over time, other thermal shock test methods were developed, but ultimately, given the uncomplicated nature of the test, they all ended up being incredibly similar. Circling back to IPC, interested committee volunteers also took it upon themselves to develop some thermal shock test methods that are directly related to PCB construction. Two of the more common test methods are: IPC-TM-650, method 2.6.7—Thermal Shock & Continuity, Printed Board and IPC-TM-650, method 126.96.36.199—Thermal Shock, Continuity and Microsection, Printed Board. Each of these methods, and others developed by committee members within the IPC-TM-650 test methods manual, pair the thermal shock exposure with some type of analytical testing to allow for an evaluation of the PCB’s ability to withstand the stress.
Anyone who has performed or contracted thermal shock testing knows that the process can be drawn out. As mentioned earlier, the exposure is certainly not complicated; however, the laws of thermodynamics can only be “pushed” so much as thermal mass and heat transfer limitations can greatly lengthen a given thermal shock test.
As an improvement on this drawn-out test protocol, a technology referred to as HATS (highly accelerated thermal shock) was developed. The idea behind the advancement was to speed up the traditional thermal shock test by decreasing the time needed for the test samples to reach the desired temperature extremes. Specially designed test coupons are needed, which could be a deterrent for those that would prefer to test their actual product; however, they are necessary for the equipment’s setup and, ultimately, to achieve the faster test time.
In the end, the idea of thermal shock testing is not new and the exposures themselves are all fairly similar across all the various test methodologies. Further, advancement in the test theory has been minimal over the years given its simplistic nature, other than the development of HATS testing which also has its detractors. Ultimately, the “during” or “pre/post” exposure evaluation is the truly critical part of this realm of testing. Being able to detect, locate, and then understand any failure that you’ve experienced as the result of the testing—that is of real benefit to the tester. And this sentiment holds not just for PCB test samples, but for any type of test specimen that is exposed to thermal shock testing. If there is no metric that your test sample is being held accountable to, then why did you perform the test to begin with?
Keith M. Sellers is operations manager with NTS in Baltimore, Maryland. To read past columns or to contact Sellers, click here.
Eitor's Note: This article originally appeared in the April 2017 issue of The PCB Magazine.