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EIPC to Hold Technical Snapshot Webinar on November 24
November 18, 2021 | EIPCEstimated reading time: Less than a minute
EIPC will be holding a live technical webinar featuring Daniel Schulze of Dyconex, Lars Böttcher of Fraunhofer-Institut für Zuverlässigkeit und Mikrointegration IZM, and Michael Schleicher of Semikron Elektronik GmbH.
To be held on November 24, 2021, the webinar will tackle advanced high-density packaging substrates for RF and miniaturization, high-density substrate technologies for fan-out and panel-level packaging, and disruptive approach in the design and tool chain of additively manufactured circuit boards.
For more information or to register, contact eipc@eipc.org.
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Indium Corporation to Showcase HIA Materials at ECTC
05/07/2024 | Indium CorporationAs an industry leader in innovative materials solutions for semiconductor packaging and assembly, Indium Corporation® will feature its advanced products designed to meet the evolving challenges of heterogeneous integration and assembly (HIA) and fine-pitch system-in-package (SiP) applications at the 74th Electronic Components and Technology Conference (ECTC), May 28‒31, in Denver, Colorado.
Siemens Delivers New Solido IP Validation Suite
05/07/2024 | SiemensSiemens Digital Industries Software introduced Solido™ IP Validation Suite software, a comprehensive, automated signoff solution for quality assurance across all design intellectual property (IP) types, including standard cells, memories and IP blocks.
Altair Acquires Research in Flight, Forging a New Path for Aerodynamic Analysis
05/07/2024 | AltairAltair a global leader in computational intelligence, announced it has acquired Research in Flight, maker of FlightStream®, which provides computational fluid dynamics (CFD) software with a large footprint in the aerospace and defense sector and a growing presence in marine, energy, turbomachinery, and automotive applications.
Happy’s Tech Talk #28: The Power Mesh Architecture for PCBs
05/07/2024 | Happy Holden -- Column: Happy’s Tech TalkA significant decrease in HDI substrate production cost can be achieved by reducing the number of substrate layers from conventional through-hole multilayers and microvia multilayers of eight, 10, 12 (and more), down to four. Besides reducing direct processing steps, yield will increase as defect producing operations are eliminated.
Hirose Launches Solution Partner Network to Address Changing Design Challenges
05/06/2024 | HiroseHirose, a leader in the design and manufacturing of innovative connector solutions, has established a Solution Partner Network that enables OEMs to quickly explore product design, specialty IP, and component fulfillment options that best suit their needs.